<div dir="ltr"><div>Seems reasonable though I thought you had patches to the constant combining to fix this. Maybe they'll be ready in time that we won't need this?<br></div></div><br><div class="gmail_quote"><div dir="ltr">On Tue, Dec 4, 2018 at 1:18 AM Iago Toral Quiroga <<a href="mailto:itoral@igalia.com">itoral@igalia.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">3-src instructions don't support immediates, but since 36bc5f06dd22,<br>
we allow them on MAD and LRP relying on the combine constants pass to<br>
fix it up later. However, that pass is specialized for 32-bit float<br>
immediates and can't handle HF constants at present, so this patch<br>
ensures that copy-propagation only does this for 32-bit constants.<br>
---<br>
src/intel/compiler/brw_fs_copy_propagation.cpp | 12 ++++++++++--<br>
1 file changed, 10 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/src/intel/compiler/brw_fs_copy_propagation.cpp b/src/intel/compiler/brw_fs_copy_propagation.cpp<br>
index ab34b63748e..58d5080b4e9 100644<br>
--- a/src/intel/compiler/brw_fs_copy_propagation.cpp<br>
+++ b/src/intel/compiler/brw_fs_copy_propagation.cpp<br>
@@ -741,8 +741,16 @@ fs_visitor::try_constant_propagate(fs_inst *inst, acp_entry *entry)<br>
<br>
case BRW_OPCODE_MAD:<br>
case BRW_OPCODE_LRP:<br>
- inst->src[i] = val;<br>
- progress = true;<br>
+ /* 3-src instructions can't take IMM registers, however, for 32-bit<br>
+ * floating instructions we rely on the combine constants pass to fix<br>
+ * it up. For anything else, we shouldn't be promoting immediates<br>
+ * until we can make the pass capable of combining constants of<br>
+ * different sizes.<br>
+ */<br>
+ if (val.type == BRW_REGISTER_TYPE_F) {<br>
+ inst->src[i] = val;<br>
+ progress = true;<br>
+ }<br>
break;<br>
<br>
default:<br>
-- <br>
2.17.1<br>
<br>
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</blockquote></div>