<html dir="ltr"><head></head><body style="text-align:left; direction:ltr;"><div>On Fri, 2018-12-07 at 11:57 -0600, Jason Ekstrand wrote:</div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Tue, Dec 4, 2018 at 1:18 AM Iago Toral Quiroga <<a href="mailto:itoral@igalia.com">itoral@igalia.com</a>> wrote:<br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex">From the Skylake PRM, Extended Math Function:<br>
<br>
"The execution size must be no more than 8 when half-floats<br>
are used in source or destination operand."<br>
<br>
Earlier generations do not support Extended Math with half-float.<br>
---<br>
src/intel/compiler/brw_fs.cpp | 30 +++++++++++++++++++++++-------<br>
1 file changed, 23 insertions(+), 7 deletions(-)<br>
<br>
diff --git a/src/intel/compiler/brw_fs.cpp b/src/intel/compiler/brw_fs.cpp<br>
index 43b920ae33d..509c6febf38 100644<br>
--- a/src/intel/compiler/brw_fs.cpp<br>
+++ b/src/intel/compiler/brw_fs.cpp<br>
@@ -5386,18 +5386,34 @@ get_lowered_simd_width(const struct gen_device_info *devinfo,<br>
case SHADER_OPCODE_EXP2:<br>
case SHADER_OPCODE_LOG2:<br>
case SHADER_OPCODE_SIN:<br>
- case SHADER_OPCODE_COS:<br>
+ case SHADER_OPCODE_COS: {<br>
/* Unary extended math instructions are limited to SIMD8 on Gen4 and<br>
* Gen6.<br>
*/<br>
- return (devinfo->gen >= 7 ? MIN2(16, inst->exec_size) :<br>
- devinfo->gen == 5 || devinfo->is_g4x ? MIN2(16, inst->exec_size) :<br>
- MIN2(8, inst->exec_size));<br>
+ unsigned max_width =<br>
+ (devinfo->gen >= 7 ? MIN2(16, inst->exec_size) :<br>
+ devinfo->gen == 5 || devinfo->is_g4x ? MIN2(16, inst->exec_size) :<br>
+ MIN2(8, inst->exec_size));<br></blockquote><div><br></div><div>Curro went a lot of work to structure this as a nested ternary. I agree that that isn't really holding up anymore but if we're going to break with it, let's break with it in a more readable way:</div><div><br></div><div>if (devinfo->gen == 6 || (devinfo->gen == 4 && !devinfo->is_g4x))</div><div> return MIN2(8, inst->exec_size);</div><div>if (inst->dst.type == BRW_REGISTER_TYPE_HF)</div><div> return MIN2(8, inst->exec_size);</div><div>else</div><div> return MIN2(16, inst->exec_size);<br></div></div></div></blockquote><div><br></div><div>Sure, will do that.</div><div><br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex">
- case SHADER_OPCODE_POW:<br>
+ /* Extended Math Function is limited to SIMD8 with half-float */<br>
+ if (inst->dst.type == BRW_REGISTER_TYPE_HF)<br>
+ max_width = MIN2(max_width, 8);<br>
+<br>
+ return max_width;<br>
+ }<br>
+<br>
+ case SHADER_OPCODE_POW: {<br>
/* SIMD16 is only allowed on Gen7+. */<br>
- return (devinfo->gen >= 7 ? MIN2(16, inst->exec_size) :<br>
- MIN2(8, inst->exec_size));<br>
+ unsigned max_width =<br>
+ (devinfo->gen >= 7 ? MIN2(16, inst->exec_size) :<br>
+ MIN2(8, inst->exec_size));<br>
+<br>
+ /* Extended Math Function is limited to SIMD8 with half-float */<br>
+ if (inst->dst.type == BRW_REGISTER_TYPE_HF)<br>
+ max_width = MIN2(max_width, 8);<br>
+<br>
+ return max_width;<br>
+ }<br>
<br>
case SHADER_OPCODE_INT_QUOTIENT:<br>
case SHADER_OPCODE_INT_REMAINDER:<br>
</blockquote></div></div></blockquote></body></html>