<div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga <<a href="mailto:itoral@igalia.com">itoral@igalia.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">v2:<br>
- make 16-bit be its own separate case (Jason)<br>
<br>
Reviewed-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>><br>
---<br>
src/intel/compiler/brw_fs_nir.cpp | 18 +++++++++++++++++-<br>
1 file changed, 17 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/intel/compiler/brw_fs_nir.cpp b/src/intel/compiler/brw_fs_nir.cpp<br>
index d742f55a957..cf546b8ff09 100644<br>
--- a/src/intel/compiler/brw_fs_nir.cpp<br>
+++ b/src/intel/compiler/brw_fs_nir.cpp<br>
@@ -844,7 +844,22 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)<br>
: bld.MOV(result, brw_imm_f(1.0f));<br>
<br>
set_predicate(BRW_PREDICATE_NORMAL, inst);<br>
- } else if (type_sz(op[0].type) < 8) {<br>
+ } else if (type_sz(op[0].type) == 2) {<br>
+ /* AND(val, 0x8000) gives the sign bit.<br>
+ *<br>
+ * Predicated OR ORs 1.0 (0x3c00) with the sign bit if val is not zero.<br>
+ */<br>
+ fs_reg zero = retype(brw_imm_uw(0), BRW_REGISTER_TYPE_HF);<br>
+ bld.CMP(bld.null_reg_f(), op[0], zero, BRW_CONDITIONAL_NZ);<br>
+<br>
+ fs_reg result_int = retype(result, BRW_REGISTER_TYPE_UW);<br>
+ op[0].type = BRW_REGISTER_TYPE_UW;<br>
+ result.type = BRW_REGISTER_TYPE_UW;<br></blockquote><div><br></div><div>Why are you whacking the type on result and also making a result_int temp? I guess you just copied that from the 32-bit case? If we're going to whack result.type (which is fine), just use result for the rest of it. With that fixed,</div><div><br></div><div>Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>><br></div><div> </div><blockquote class="gmail_quote" style="margin:0px 0px 0px 0.8ex;border-left:1px solid rgb(204,204,204);padding-left:1ex">
+ bld.AND(result_int, op[0], brw_imm_uw(0x8000u));<br>
+<br>
+ inst = bld.OR(result_int, result_int, brw_imm_uw(0x3c00u));<br>
+ inst->predicate = BRW_PREDICATE_NORMAL;<br>
+ } else if (type_sz(op[0].type) == 4) {<br>
/* AND(val, 0x80000000) gives the sign bit.<br>
*<br>
* Predicated OR ORs 1.0 (0x3f800000) with the sign bit if val is not<br>
@@ -866,6 +881,7 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)<br>
* - The sign is encoded in the high 32-bit of each DF<br>
* - We need to produce a DF result.<br>
*/<br>
+ assert(type_sz(op[0].type) == 8);<br>
<br>
fs_reg zero = vgrf(glsl_type::double_type);<br>
bld.MOV(zero, setup_imm_df(bld, 0.0));<br>
-- <br>
2.17.1<br>
<br>
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</blockquote></div></div>