<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.01 Transitional//EN" "http://www.w3.org/TR/html4/loose.dtd"> <html> <body> <div dir="auto"> <div dir="auto"><span style="font-family: sans-serif; font-size: 10pt;">On January 18, 2019 01:48:25 Iago Toral <itoral@igalia.com> wrote:</span></div><div id="aqm-original" style="color: black;"><div style="text-align:left; direction:ltr;" class="aqm-original-body"><div style="color: black;"> <blockquote type="cite" class="gmail_quote" style="margin: 0 0 0 0.75ex; border-left: 1px solid #808080; padding-left: 0.75ex;"> <div>On Thu, 2019-01-17 at 13:42 -0600, Jason Ekstrand wrote:</div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><div dir="ltr">On Tue, Jan 15, 2019 at 7:54 AM Iago Toral Quiroga <<a href="mailto:itoral@igalia.com">itoral@igalia.com</a>> wrote:<br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex">Some conversions are not directly supported in hardware and need to be<br> split in two conversion instructions going through an intermediary type.<br> Doing this at the NIR level simplifies a bit the complexity in the backend.<br> <br> v2:<br> - Consider fp16 rounding conversion opcodes<br> - Properly handle swizzles on conversion sources.<br> <br> Reviewed-by: Topi Pohjolainen <<a href="mailto:topi.pohjolainen@intel.com" target="_blank">topi.pohjolainen@intel.com</a>> (v1)<br> ---<br> src/intel/Makefile.sources | 1 +<br> src/intel/compiler/brw_nir.c | 1 +<br> src/intel/compiler/brw_nir.h | 2 +<br> .../compiler/brw_nir_lower_conversions.c | 158 ++++++++++++++++++<br> src/intel/compiler/meson.build | 1 +<br> 5 files changed, 163 insertions(+)<br> create mode 100644 src/intel/compiler/brw_nir_lower_conversions.c<br> <br> diff --git a/src/intel/Makefile.sources b/src/intel/Makefile.sources<br> index 94a28d370e8..9975daa3ad1 100644<br> --- a/src/intel/Makefile.sources<br> +++ b/src/intel/Makefile.sources<br> @@ -83,6 +83,7 @@ COMPILER_FILES = \<br> compiler/brw_nir_analyze_boolean_resolves.c \<br> compiler/brw_nir_analyze_ubo_ranges.c \<br> compiler/brw_nir_attribute_workarounds.c \<br> + compiler/brw_nir_lower_conversions.c \<br> compiler/brw_nir_lower_cs_intrinsics.c \<br> compiler/brw_nir_lower_image_load_store.c \<br> compiler/brw_nir_lower_mem_access_bit_sizes.c \<br> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c<br> index 92d7fe4bede..572ab824a94 100644<br> --- a/src/intel/compiler/brw_nir.c<br> +++ b/src/intel/compiler/brw_nir.c<br> @@ -882,6 +882,7 @@ brw_postprocess_nir(nir_shader *nir, const struct brw_compiler *compiler,<br> OPT(nir_opt_move_comparisons);<br> <br> OPT(nir_lower_bool_to_int32);<br> + OPT(brw_nir_lower_conversions);<br></blockquote><div><br></div><div>This is *really* late and I don't think you actually want this to run after we apply source/destination modifiers. If you just move it to right after nir_opt_algebraic_late, that will fix a multitude of issues.<br></div></div></div></blockquote><div><br></div><div>Sure, I'll move it there.</div><div><br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"> <br> OPT(nir_lower_locals_to_regs);<br> <br> diff --git a/src/intel/compiler/brw_nir.h b/src/intel/compiler/brw_nir.h<br> index bc81950d47e..662b2627e95 100644<br> --- a/src/intel/compiler/brw_nir.h<br> +++ b/src/intel/compiler/brw_nir.h<br> @@ -114,6 +114,8 @@ void brw_nir_lower_tcs_outputs(nir_shader *nir, const struct brw_vue_map *vue,<br> GLenum tes_primitive_mode);<br> void brw_nir_lower_fs_outputs(nir_shader *nir);<br> <br> +bool brw_nir_lower_conversions(nir_shader *nir);<br> +<br> bool brw_nir_lower_image_load_store(nir_shader *nir,<br> const struct gen_device_info *devinfo);<br> void brw_nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin,<br> diff --git a/src/intel/compiler/brw_nir_lower_conversions.c b/src/intel/compiler/brw_nir_lower_conversions.c<br> new file mode 100644<br> index 00000000000..583167c7753<br> --- /dev/null<br> +++ b/src/intel/compiler/brw_nir_lower_conversions.c<br> @@ -0,0 +1,158 @@<br> +/*<br> + * Copyright © 2018 Intel Corporation<br> + *<br> + * Permission is hereby granted, free of charge, to any person obtaining a<br> + * copy of this software and associated documentation files (the "Software"),<br> + * to deal in the Software without restriction, including without limitation<br> + * the rights to use, copy, modify, merge, publish, distribute, sublicense,<br> + * and/or sell copies of the Software, and to permit persons to whom the<br> + * Software is furnished to do so, subject to the following conditions:<br> + *<br> + * The above copyright notice and this permission notice (including the next<br> + * paragraph) shall be included in all copies or substantial portions of the<br> + * Software.<br> + *<br> + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR<br> + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,<br> + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL<br> + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER<br> + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING<br> + * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS<br> + * IN THE SOFTWARE.<br> + */<br> +<br> +#include "brw_nir.h"<br> +#include "compiler/nir/nir_builder.h"<br> +<br> +static nir_op<br> +get_conversion_op(nir_alu_type src_type,<br> + unsigned src_bit_size,<br> + nir_alu_type dst_type,<br> + unsigned dst_bit_size,<br> + nir_rounding_mode rounding_mode)<br> +{<br> + nir_alu_type src_full_type = (nir_alu_type) (src_type | src_bit_size);<br> + nir_alu_type dst_full_type = (nir_alu_type) (dst_type | dst_bit_size);<br> +<br> + return nir_type_conversion_op(src_full_type, dst_full_type, rounding_mode);<br> +}<br> +<br> +static nir_rounding_mode<br> +get_opcode_rounding_mode(nir_op op)<br> +{<br> + switch (op) {<br> + case nir_op_f2f16_rtz:<br> + return nir_rounding_mode_rtz;<br> + case nir_op_f2f16_rtne:<br> + return nir_rounding_mode_rtne;<br> + default:<br> + return nir_rounding_mode_undef;<br> + }<br> +}<br> +<br> +static void<br> +split_conversion(nir_builder *b, nir_alu_instr *alu, nir_op op1, nir_op op2)<br> +{<br> + b->cursor = nir_before_instr(&alu->instr);<br> + assert(alu->dest.write_mask == 1);<br> + nir_ssa_def *src = nir_ssa_for_alu_src(b, alu, 0);<br></blockquote><div><br></div>Hrm... Given how late this pass runs, I'm not a fan of using nir_ssa_for_alu_src because it might insert a MOV and we don't copy-prop afterwards. Instead, we could assert that the destination is SSA and do</div></div></blockquote><div><br></div><div>I did this because I found cases where we would have things like a vec4 load and then a handful of swizzled MOVs to extract the components of the vec4 into scalars and this helper would handle the swizzled sources gracefully.However, I think what you suggest below should be just fine, so I'll do that.</div></blockquote></div></div></div><div dir="auto"><br></div><div dir="auto">Just to be clear, you don't need to make any of the changes suggested here if you just move where we call the pass. If copy-prop runs after it, that will clean up the added movs.</div><div dir="auto"><br></div><div id="aqm-original" style="color: black;" dir="auto"><div style="text-align:left; direction:ltr;" class="aqm-original-body"><div style="color: black;"><blockquote type="cite" class="gmail_quote" style="margin: 0 0 0 0.75ex; border-left: 1px solid #808080; padding-left: 0.75ex;"><div></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote">b->cursor = nir_after_instr(&alu->instr);</div><div class="gmail_quote">alu->op = op1;</div><div class="gmail_quote">alu->dest.bit_size = nir_alu_type_get_type_size(nir_op_infos[alu->op].output_type);<br></div><div class="gmail_quote">nir_ssa_def *new_res = nir_build_alu(b, op2, &alu->dest.dest.ssa, NULL, NULL, NULL);</div><div class="gmail_quote">nir_ssa_def_rewrite_uses_after(&alu->dest.dest.ssa, nir_src_for_ssa(new_res),</div><div class="gmail_quote"> new_res->parent_instr);</div></div><div dir="ltr"><div class="gmail_quote">If you don't feel comfortable whacking the opcode in the original instruction, then just make a new one and build it directly with the old instruction's ALU src. Or, we could just move where it's run. (see my comment above.)</div></div><div dir="ltr"><div class="gmail_quote"></div></div><div><br></div><div dir="ltr"><div class="gmail_quote"><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"> + nir_ssa_def *tmp = nir_build_alu(b, op1, src, NULL, NULL, NULL);<br> + nir_ssa_def *res = nir_build_alu(b, op2, tmp, NULL, NULL, NULL);<br> + nir_ssa_def_rewrite_uses(&alu->dest.dest.ssa, nir_src_for_ssa(res));<br> + nir_instr_remove(&alu->instr);<br> +}<br> +<br> +static bool<br> +lower_instr(nir_builder *b, nir_alu_instr *alu)<br> +{<br> + unsigned src_bit_size = nir_src_bit_size(alu->src[0].src);<br> + nir_alu_type src_type = nir_op_infos[alu->op].input_types[0];<br> + nir_alu_type src_full_type = (nir_alu_type) (src_type | src_bit_size);<br> +<br> + unsigned dst_bit_size = nir_dest_bit_size(alu->dest.dest);<br> + nir_alu_type dst_type = nir_op_infos[alu->op].output_type;<br> + nir_alu_type dst_full_type = (nir_alu_type) (dst_type | dst_bit_size);<br></blockquote><div><br></div><div>The nir_op_infos[*].output_type will already be a full type. Maybe just delete the dst_type temporary so that no one gets confused and thinks it's a base type.<br></div></div></div></blockquote><div><br></div><div>Right, will do that.</div><div><br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"> +<br> + /* BDW PRM, vol02, Command Reference Instructions, mov - MOVE:<br> + *<br> + * "There is no direct conversion from HF to DF or DF to HF.<br> + * Use two instructions and F (Float) as an intermediate type.<br> + *<br> + * There is no direct conversion from HF to Q/UQ or Q/UQ to HF.<br> + * Use two instructions and F (Float) or a word integer type<br> + * or a DWord integer type as an intermediate type."<br> + */<br> + if ((src_full_type == nir_type_float16 && dst_bit_size == 64) ||<br> + (src_bit_size == 64 && dst_full_type == nir_type_float16)) {<br> + nir_op op1 = get_conversion_op(src_type, src_bit_size, src_type, 32,<br> + nir_rounding_mode_undef);<br> + nir_op op2 = get_conversion_op(src_type, 32, dst_type, dst_bit_size,<br> + get_opcode_rounding_mode(alu->op));<br> + split_conversion(b, alu, op1, op2);<br> + return true;<br> + }<br> +<br> + /* SKL PRM, vol 02a, Command Reference: Instructions, Move:<br> + *<br> + * "There is no direct conversion from B/UB to DF or DF to B/UB. Use<br> + * two instructions and a word or DWord intermediate type."<br> + *<br> + * "There is no direct conversion from B/UB to Q/UQ or Q/UQ to B/UB.<br> + * Use two instructions and a word or DWord intermediate integer<br> + * type."<br> + */<br> + if ((src_bit_size == 8 && dst_bit_size == 64) ||<br> + (src_bit_size == 64 && dst_bit_size == 8)) {<br> + nir_op op1 = get_conversion_op(src_type, src_bit_size, src_type, 32,<br> + nir_rounding_mode_undef);<br> + nir_op op2 = get_conversion_op(src_type, 32, dst_type, dst_bit_size,<br> + nir_rounding_mode_undef);<br> + split_conversion(b, alu, op1, op2);<br> + return true;<br> + }<br> +<br> + return false;<br> +}<br> +<br> +static bool<br> +lower_impl(nir_function_impl *impl)<br> +{<br> + nir_builder b;<br> + nir_builder_init(&b, impl);<br> + bool progress = false;<br> +<br> + nir_foreach_block(block, impl) {<br> + nir_foreach_instr_safe(instr, block) {<br> + if (instr->type != nir_instr_type_alu)<br> + continue;<br> +<br> + nir_alu_instr *alu = nir_instr_as_alu(instr);<br> + assert(alu->dest.dest.is_ssa);<br> +<br> + if (nir_op_infos[alu->op].num_inputs > 1)<br></blockquote><div><br></div><div>I don't think this is a reliable way to detect conversion opcodes. There are many unary operations that aren't conversions. You're only getting lucky because there are non which do float16 <-> 64=bit or 8-bit <-> 64-bit. I've thought many times about throwing a boolean in nir_op_infos for is_conversion. Maybe now is a good time to do it?<br></div></div></div></blockquote><div><br></div><div>Yes, I knew that this was not going to only let conversions through and was relying on what you say above. Adding an is_conversion field souns good to me, alternatively I guess we could add a is_conversion() helper, but I guess having the field in nir_op_infos maye be a bit easier to maintain if we want to add more opcodes in the future.</div><div><br></div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"><div dir="ltr"><div class="gmail_quote"><div> </div><blockquote type="cite" style="margin:0 0 0 .8ex; border-left:2px #729fcf solid;padding-left:1ex"> + continue;<br> +<br> + progress = lower_instr(&b, alu) || progress;<br> + }<br> + }<br> +<br> + if (progress) {<br> + nir_metadata_preserve(impl, nir_metadata_block_index |<br> + nir_metadata_dominance);<br> + }<br> +<br> + return progress;<br> +}<br> +<br> +bool<br> +brw_nir_lower_conversions(nir_shader *shader)<br> +{<br> + bool progress = false;<br> +<br> + nir_foreach_function(function, shader) {<br> + if (function->impl)<br> + progress |= lower_impl(function->impl);<br> + }<br> +<br> + return progress;<br> +}<br> diff --git a/src/intel/compiler/meson.build b/src/intel/compiler/meson.build<br> index f8e5e2518fe..9daf2a94260 100644<br> --- a/src/intel/compiler/meson.build<br> +++ b/src/intel/compiler/meson.build<br> @@ -76,6 +76,7 @@ libintel_compiler_files = files(<br> 'brw_nir_analyze_boolean_resolves.c',<br> 'brw_nir_analyze_ubo_ranges.c',<br> 'brw_nir_attribute_workarounds.c',<br> + 'brw_nir_lower_conversions.c',<br> 'brw_nir_lower_cs_intrinsics.c',<br> 'brw_nir_lower_image_load_store.c',<br> 'brw_nir_lower_mem_access_bit_sizes.c',<br> </blockquote></div></div></blockquote></blockquote> </div> </div>  </div><div dir="auto"><br></div> </div></body> </html>