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<div class="moz-cite-prefix">On 6/19/19 11:03 AM, Bas Nieuwenhuizen
wrote:<br>
</div>
<blockquote type="cite"
cite="mid:CAP+8YyGwLqZ+QP66EaLQ8BMdEGyifiNY7wd6SF5uiq9nXs1dqw@mail.gmail.com">
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<div>Actually, retract r-b, please fix the legacy accesses on
gfx9+ too.<br>
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Yes, I will fix and send v2.<br>
<blockquote type="cite"
cite="mid:CAP+8YyGwLqZ+QP66EaLQ8BMdEGyifiNY7wd6SF5uiq9nXs1dqw@mail.gmail.com">
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<div dir="ltr" class="gmail_attr">On Wed, Jun 19, 2019,
11:02 AM Bas Nieuwenhuizen <<a
href="mailto:bas@basnieuwenhuizen.nl"
moz-do-not-send="true">bas@basnieuwenhuizen.nl</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">
<div dir="auto">R-b</div>
<br>
<div class="gmail_quote">
<div dir="ltr" class="gmail_attr">On Tue, Jun 18, 2019,
4:12 PM Samuel Pitoiset <<a
href="mailto:samuel.pitoiset@gmail.com"
target="_blank" rel="noreferrer"
moz-do-not-send="true">samuel.pitoiset@gmail.com</a>>
wrote:<br>
</div>
<blockquote class="gmail_quote" style="margin:0 0 0
.8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by:
Samuel Pitoiset <<a
href="mailto:samuel.pitoiset@gmail.com"
rel="noreferrer noreferrer" target="_blank"
moz-do-not-send="true">samuel.pitoiset@gmail.com</a>><br>
---<br>
src/amd/vulkan/radv_cmd_buffer.c | 40
+++++++++++++++++++++++++++++++-<br>
1 file changed, 39 insertions(+), 1 deletion(-)<br>
<br>
diff --git a/src/amd/vulkan/radv_cmd_buffer.c
b/src/amd/vulkan/radv_cmd_buffer.c<br>
index a26bf6c6a67..ebeee2c3723 100644<br>
--- a/src/amd/vulkan/radv_cmd_buffer.c<br>
+++ b/src/amd/vulkan/radv_cmd_buffer.c<br>
@@ -4912,11 +4912,49 @@ void
radv_initialize_dcc(struct radv_cmd_buffer
*cmd_buffer,<br>
const VkImageSubresourceRange
*range, uint32_t value)<br>
{<br>
struct radv_cmd_state *state =
&cmd_buffer->state;<br>
+ uint32_t level_count =
radv_get_levelCount(image, range);<br>
+ unsigned size = 0;<br>
<br>
state->flush_bits |=
RADV_CMD_FLAG_FLUSH_AND_INV_CB |<br>
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;<br>
<br>
- state->flush_bits |=
radv_clear_dcc(cmd_buffer, image, range, value);<br>
+ /* Initialize the mipmap levels with DCC
first. */<br>
+ for (unsigned l = 0; l < level_count; l++)
{<br>
+ uint32_t level =
range->baseMipLevel + l;<br>
+ struct legacy_surf_level *surf_level =<br>
+
&image->planes[0].surface.u.legacy.level[level];<br>
+<br>
+ if
(!surf_level->dcc_fast_clear_size)<br>
+ break;<br>
+<br>
+ state->flush_bits |=
radv_dcc_clear_level(cmd_buffer, image,<br>
+
level, value);<br>
+ }<br>
+<br>
+ /* When DCC is enabled with mipmaps, some
levels might not support fast<br>
+ * clears and we have to initialize them as
"fully expanded".<br>
+ */<br>
+ if (image->planes[0].surface.num_dcc_levels
> 1) {<br>
+ /* Compute the size of all fast
clearable DCC levels. */<br>
+ for (unsigned i = 0; i <
image->planes[0].surface.num_dcc_levels; i++) {<br>
+ struct legacy_surf_level
*surf_level =<br>
+
&image->planes[0].surface.u.legacy.level[i];<br>
+<br>
+ if
(!surf_level->dcc_fast_clear_size)<br>
+ break;<br>
+<br>
+ size =
surf_level->dcc_offset +
surf_level->dcc_fast_clear_size;<br>
+ }<br>
+<br>
+ /* Initialize the mipmap levels
without DCC. */<br>
+ if (size !=
image->planes[0].surface.dcc_size) {<br>
+ state->flush_bits |=<br>
+
radv_fill_buffer(cmd_buffer, image->bo,<br>
+
image->offset + image->dcc_offset + size,<br>
+
image->planes[0].surface.dcc_size - size,<br>
+
0xffffffff);<br>
+ }<br>
+ }<br>
<br>
state->flush_bits |=
RADV_CMD_FLAG_FLUSH_AND_INV_CB |<br>
RADV_CMD_FLAG_FLUSH_AND_INV_CB_META;<br>
-- <br>
2.22.0<br>
<br>
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