<div dir="auto"><div>I wonder what PGO really does other than placing likely/unlikely.</div><div dir="auto"><br></div><div dir="auto">Marek<br><br><div class="gmail_quote" dir="auto"><div dir="ltr" class="gmail_attr">On Thu., Feb. 13, 2020, 13:43 Dylan Baker, <<a href="mailto:dylan@pnwbakers.com">dylan@pnwbakers.com</a>> wrote:<br></div><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">I actually spent a bunch of time toying with PGO a couple of years ago. I got<br>
the guidance all working and was able to train it, but what we found was that it<br>
made the specific workloads we threw at it much faster, but it made every real<br>
world use case I tried (playing a game, running piglit, gnome) slower, often<br>
significantly so.<br>
<br>
The hard part is not setting up pgo, it's getting the right training data.<br>
<br>
Dylan<br>
<br>
Quoting Marek Olšák (2020-02-13 10:30:46)<br>
> [Forked from the other thread]<br>
> <br>
> Guys, we could run some simple tests similar to piglit/drawoverhead as the last<br>
> step of the pgo=generate build. Tests like that should exercise the most common<br>
> codepaths in drivers. We could add subtests that we care about the most.<br>
> <br>
> Marek<br>
> <br>
> On Thu., Feb. 13, 2020, 13:16 Dylan Baker, <<a href="mailto:dylan@pnwbakers.com" target="_blank" rel="noreferrer">dylan@pnwbakers.com</a>> wrote:<br>
> <br>
> meson has buildtins for both of these, -Db_lto=true turns on lto, for pgo<br>
> you<br>
> would run:<br>
> <br>
> meson build -Db_pgo=generate<br>
> ninja -C build<br>
> <run whatever guidance you want><br>
> meson configure build -Db_pgo=use<br>
> ninja -C build<br>
> <br>
> Quoting Marek Olšák (2020-02-12 10:46:12)<br>
> > How do you enable LTO+PGO? Is it something we could enable by default for<br>
> > release builds?<br>
> ><br>
> > Marek<br>
> ><br>
> > On Wed, Feb 12, 2020 at 1:56 AM Dieter Nützel <<a href="mailto:Dieter@nuetzel-hh.de" target="_blank" rel="noreferrer">Dieter@nuetzel-hh.de</a>><br>
> wrote:<br>
> ><br>
> > Hello Gert,<br>
> ><br>
> > your merge 'broke' LTO and then later on PGO compilation/linking.<br>
> ><br>
> > I do generally compiling with '-Dgallium-drivers=<br>
> r600,radeonsi,swrast'<br>
> > for testing radeonsi and (your) r600 work. ;-)<br>
> ><br>
> > After your merge I get several warnings in 'addrlib' with LTO and<br>
> even a<br>
> > compiler error (gcc (SUSE Linux) 9.2.1 20200128).<br>
> ><br>
> > I had to disable 'r600' ('swrast' is needed for 'nine') to get a<br>
> working<br>
> > LTO and even better PGO radeonsi driver.<br>
> > I'm preparing GREAT LTO+PGO (the later is the greater) numbers over<br>
> the<br>
> > last 2 months. I'll send my results later, today.<br>
> ><br>
> > Summary<br>
> > radeonsi is ~40% smaller and 16-20% faster with PGO (!!!).<br>
> ><br>
> > Honza and the GCC people (Intel's ICC folks) do GREAT things.<br>
> > 'glmark2' numbers are better then 'vkmark'. (Hello, Marek.).<br>
> ><br>
> > Need some sleep.<br>
> ><br>
> > See my log, below.<br>
> ><br>
> > Greetings and GREAT work!<br>
> ><br>
> > -Dieter<br>
> ><br>
> > Am 09.02.2020 15:46, schrieb Gert Wollny:<br>
> > > Am Donnerstag, den 23.01.2020, 20:31 +0100 schrieb Gert Wollny:<br>
> > >> has anybody any objections if I merge the r600/NIR code?<br>
> > >> Without explicitely setting the debug flag it doesn't change a<br>
> > >> thing, but it would be better to continue developing in-tree.<br>
> > > Okay, if nobody objects, I'll merge it Monday evening.<br>
> > ><br>
> > > Best,<br>
> > > Gert<br>
> ><br>
> > [1425/1433] Linking target src/gallium/targets/dri/libgallium_dri.so.<br>
> > FAILED: src/gallium/targets/dri/libgallium_dri.so<br>
> > c++ -o src/gallium/targets/dri/libgallium_dri.so<br>
> > 'src/gallium/targets/dri/8381c20@@gallium_dri@sha/target.c.o' -flto<br>
> > -fprofile-generate -Wl,--as-needed -Wl,--no-undefined -Wl,-O1 -shared<br>
> > -fPIC -Wl,--start-group -Wl,-soname,libgallium_dri.so<br>
> > src/mesa/libmesa_gallium.a src/mesa/libmesa_common.a<br>
> > src/compiler/glsl/libglsl.a src/compiler/glsl/glcpp/libglcpp.a<br>
> > src/util/libmesa_util.a src/util/format/libmesa_format.a<br>
> > src/compiler/nir/libnir.a src/compiler/libcompiler.a<br>
> > src/mesa/libmesa_sse41.a src/mesa/drivers/dri/common/libdricommon.a<br>
> > src/mesa/drivers/dri/common/libmegadriver_stub.a<br>
> > src/gallium/state_trackers/dri/libdri.a<br>
> > src/gallium/auxiliary/libgalliumvl.a src/gallium/auxiliary/<br>
> libgallium.a<br>
> > src/mapi/shared-glapi/libglapi.so.0.0.0<br>
> > src/gallium/auxiliary/pipe-loader/libpipe_loader_static.a<br>
> > src/loader/libloader.a src/util/libxmlconfig.a<br>
> > src/gallium/winsys/sw/null/libws_null.a<br>
> > src/gallium/winsys/sw/wrapper/libwsw.a<br>
> > src/gallium/winsys/sw/dri/libswdri.a<br>
> > src/gallium/winsys/sw/kms-dri/libswkmsdri.a<br>
> > src/gallium/drivers/llvmpipe/libllvmpipe.a<br>
> > src/gallium/drivers/softpipe/libsoftpipe.a<br>
> > src/gallium/drivers/r600/libr600.a<br>
> > src/gallium/winsys/radeon/drm/libradeonwinsys.a<br>
> > src/gallium/drivers/radeonsi/libradeonsi.a<br>
> > src/gallium/winsys/amdgpu/drm/libamdgpuwinsys.a<br>
> > src/amd/addrlib/libaddrlib.a src/amd/common/libamd_common.a<br>
> > src/amd/llvm/libamd_common_llvm.a -Wl,--build-id=sha1<br>
> -Wl,--gc-sections<br>
> > -Wl,--version-script /opt/mesa/src/gallium/targets/dri/dri.sym<br>
> > -Wl,--dynamic-list /opt/mesa/src/gallium/targets/dri/../dri-vdpau.dyn<br>
> > /usr/lib64/libdrm.so -L/usr/local/lib -lLLVM-10git -pthread<br>
> > /usr/lib64/libexpat.so<br>
> > /usr/lib64/gcc/x86_64-suse-linux/9/../../../../lib64/libz.so -lm<br>
> > /usr/lib64/gcc/x86_64-suse-linux/9/../../../../lib64/libzstd.so<br>
> > -L/usr/local/lib -lLLVM-10git /usr/lib64/libunwind.so -ldl -lsensors<br>
> > -L/usr/local/lib -lLLVM-10git /usr/lib64/libdrm_radeon.so<br>
> > /usr/lib64/libelf.so -L/usr/local/lib -lLLVM-10git -L/usr/local/lib<br>
> > -lLLVM-10git -L/usr/local/lib -lLLVM-10git /usr/lib64/<br>
> libdrm_amdgpu.so<br>
> > -L/usr/local/lib -lLLVM-10git -Wl,--end-group<br>
> > '-Wl,-rpath,$ORIGIN/../../../mesa:$ORIGIN/../../../compiler/<br>
> glsl:$ORIGIN/..<br>
> > /../../compiler/glsl/glcpp:$ORIGIN/../../../util:$ORIGIN/../../../<br>
> util/<br>
> > format:$ORIGIN/../../../compiler/nir:$ORIGIN/../../../<br>
> compiler:$ORIGIN/..<br>
> > /../../mesa/drivers/dri/common:$ORIGIN/../../state_trackers/<br>
> dri:$ORIGIN/..<br>
> > /../auxiliary:$ORIGIN/../../../mapi/shared-glapi:$ORIGIN/../../<br>
> auxiliary/<br>
> > pipe-loader:$ORIGIN/../../../loader:$ORIGIN/../../winsys/sw/<br>
> null:$ORIGIN/..<br>
> > /../winsys/sw/wrapper:$ORIGIN/../../winsys/sw/dri:$ORIGIN/../../<br>
> winsys/sw/<br>
> > kms-dri:$ORIGIN/../../drivers/llvmpipe:$ORIGIN/../../drivers/<br>
> > softpipe:$ORIGIN/../../drivers/r600:$ORIGIN/../../winsys/radeon/<br>
> drm:$ORIGIN<br>
> > /../../drivers/radeonsi:$ORIGIN/../../winsys/amdgpu/drm:$ORIGIN/../..<br>
> /../<br>
> > amd/addrlib:$ORIGIN/../../../amd/common:$ORIGIN/../../../amd/llvm'<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/mesa<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/compiler/glsl<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/compiler/glsl/glcpp<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/util<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/util/format<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/compiler/nir<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/compiler<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/mesa/drivers/dri/common<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/state_trackers/dri<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/auxiliary<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/mapi/shared-glapi<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/auxiliary/pipe-loader<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/loader<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/null<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/wrapper<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/dri<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/kms-dri<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/llvmpipe<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/softpipe<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/r600<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/radeon/drm<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/radeonsi<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/<br>
> > gallium/winsys/amdgpu/drm<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/amd/addrlib<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/amd/common<br>
> > -Wl,-rpath-link,/opt/mesa/build/src/amd/llvm<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > during IPA pass: materialize-all-clones<br>
> > In function ‘operator<<.constprop’:<br>
> > lto1: internal compiler error: in cgraph_add_edge_to_call_site_hash,<br>
> at<br>
> > cgraph.c:719<br>
> > Please submit a full bug report,<br>
> > with preprocessed source if appropriate.<br>
> > See <<a href="https://bugs.opensuse.org/" rel="noreferrer noreferrer" target="_blank">https://bugs.opensuse.org/</a>> for instructions.<br>
> > lto-wrapper: fatal error: c++ returned 1 exit status<br>
> > compilation terminated.<br>
> > /usr/lib64/gcc/x86_64-suse-linux/9/../../../../x86_64-suse-linux/bin/<br>
> ld:<br>
> > error: lto-wrapper failed<br>
> > collect2: error: ld returned 1 exit status<br>
> > [1429/1433] Linking target<br>
> > src/gallium/targets/pipe-loader/pipe_radeonsi.so.<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > [1430/1433] Linking target<br>
> > src/gallium/targets/va/libgallium_drv_video.so.<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > [1431/1433] Linking target<br>
> > src/gallium/targets/vdpau/libvdpau_gallium.so.1.0.0.<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > [1432/1433] Linking target src/amd/vulkan/libvulkan_radeon.so.<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > [1433/1433] Linking target<br>
> > src/gallium/targets/d3dadapter9/d3dadapter9.so.1.0.0.<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning: type<br>
> > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 51 | {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note: the first<br>
> > difference of corresponding definitions is field<br>
> ‘BANK_INTERLEAVE_SIZE’<br>
> > 54 | unsigned int BANK_INTERLEAVE_SIZE : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note: a field<br>
> > with different name is defined in another translation unit<br>
> > 56 | unsigned int NUM_PKRS : 3;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning: type<br>
> > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule [-Wodr]<br>
> > 48 | union GB_ADDR_CONFIG {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a<br>
> different<br>
> > type is defined in another translation unit<br>
> > 48 | union GB_ADDR_CONFIG<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the first<br>
> > difference of corresponding definitions is field ‘bitfields’<br>
> > 83 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a field<br>
> of<br>
> > same name but different type is defined in another translation unit<br>
> > 65 | } bitfields, bits;<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note: type<br>
> ‘struct<br>
> > <anon>’ itself violates the C++ One Definition Rule<br>
> > 49 | struct {<br>
> > | ^<br>
> > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: the<br>
> > incompatible type is defined here<br>
> > 51 | {<br>
> > | ^<br>
> > ninja: build stopped: subcommand failed.<br>
> > 3123.512u 166.581s 9:24.69 582.6% 0+0k 16+7235672io 0pf+0w<br>
> ><br>
> <br>
</blockquote></div></div></div>