[Mesa-stable] [PATCH] i965/vs: set up sampler state pointer for Gen4/5.

[Carl Worth]

Chris Forbes <chrisf at ijw.co.nz> writes:
> Fixes broken filter and lod selection for vertex texturing.
> (txs/txf only worked properly because they ignore the sampler state
> completely)
>
> Signed-off-by: Chris Forbes <chrisf at ijw.co.nz>
> Cc: mesa-stable at lists.freedesktop.org

Thanks, Chris.

I'd like to pick this (and the following patch) as my last work to
finalize 9.1.6. This patch doesn't generate any merge conflict, but it
does fail to compile on 9.1.

I came up with the following changes to get it to compile. Can you
please double-check that I've done this correctly and haven't missed
anything?

Thanks,

-Carl

diff --git a/src/mesa/drivers/dri/i965/brw_vs_state.c b/src/mesa/drivers/dri/i965/brw_vs_state.c
index 40ca4d2..16bd56e 100644
--- a/src/mesa/drivers/dri/i965/brw_vs_state.c
+++ b/src/mesa/drivers/dri/i965/brw_vs_state.c
@@ -130,7 +130,7 @@ brw_upload_vs_unit(struct brw_context *brw)
    vs->thread4.max_threads = CLAMP(brw->urb.nr_vs_entries / 2,
 				   1, brw->max_vs_threads) - 1;
 
-   if (brw->gen == 5)
+   if (intel->gen == 5)
       vs->vs5.sampler_count = 0; /* hardware requirement */
    else {
       /* CACHE_NEW_SAMPLER */
@@ -149,11 +149,11 @@ brw_upload_vs_unit(struct brw_context *brw)
     */
    if (brw->sampler.count) {
       vs->vs5.sampler_state_pointer =
-         (brw->batch.bo->offset + brw->sampler.offset) >> 5;
-      drm_intel_bo_emit_reloc(brw->batch.bo,
+         (intel->batch.bo->offset + brw->sampler.offset) >> 5;
+      drm_intel_bo_emit_reloc(intel->batch.bo,
                               brw->vs.state_offset +
                               offsetof(struct brw_vs_unit_state, vs5),
-                              brw->batch.bo,
+                              intel->batch.bo,
                               brw->sampler.offset | vs->vs5.sampler_count,
                               I915_GEM_DOMAIN_INSTRUCTION, 0);
    }
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