[Mesa-stable] [PATCH] mesa: guard better when building with sse4.1 optimisations

[Emil Velikov]

When the compiler is not capable/does not accept -msse4.1 while the target
has the instruction set we'll blow up as _mesa_streaming_load_memcpy is
going to be undefined.

To make sure that never happens, wrap the runtime cpu check+caller in an
ifdef thus do not compile that hunk of the code.

Fix the android build by enabling the optimisation and adding the define
where applicable.

Cc: Matt Turner <mattst88 at gmail.com>
Cc: Adrian Negreanu <adrian.m.negreanu at intel.com>
Cc: "10.1 10.2" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Emil Velikov <emil.l.velikov at gmail.com>
---

Hi Matt,
I believe this is what you had in mind with your earlier comment - 
avoid calling intel_miptree_map_movntdqa, when compiler does not support 
-msse4.1, otherwise we end up with garbage output and/or locked up GPU.

Andrian,
Any chance you can give this patch/the series a test ? Things seems to 
build fine in here but I'm a bit short on a Intel GPU.

-Emil

 configure.ac                                  | 3 +++
 src/mesa/Android.libmesa_dricore.mk           | 1 +
 src/mesa/drivers/dri/i965/Android.mk          | 5 +++++
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 2 ++
 4 files changed, 11 insertions(+)

diff --git a/configure.ac b/configure.ac
index 698cd8d..d045619 100644
--- a/configure.ac
+++ b/configure.ac
@@ -238,6 +238,9 @@ dnl
 dnl Optional flags, check for compiler support
 dnl
 AX_CHECK_COMPILE_FLAG([-msse4.1], [SSE41_SUPPORTED=1], [SSE41_SUPPORTED=0])
+if test "x$SSE41_SUPPORTED" = x1; then
+    DEFINES="$DEFINES -DUSE_SSE41"
+endif
 AM_CONDITIONAL([SSE41_SUPPORTED], [test x$SSE41_SUPPORTED = x1])
 
 dnl
diff --git a/src/mesa/Android.libmesa_dricore.mk b/src/mesa/Android.libmesa_dricore.mk
index 217f649..28d6feb 100644
--- a/src/mesa/Android.libmesa_dricore.mk
+++ b/src/mesa/Android.libmesa_dricore.mk
@@ -50,6 +50,7 @@ endif # MESA_ENABLE_ASM
 ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
 LOCAL_SRC_FILES += \
 	$(SRCDIR)main/streaming-load-memcpy.c
+LOCAL_CFLAGS := -msse4.1
 endif
 
 LOCAL_C_INCLUDES := \
diff --git a/src/mesa/drivers/dri/i965/Android.mk b/src/mesa/drivers/dri/i965/Android.mk
index 7e3fd65..2c6446f 100644
--- a/src/mesa/drivers/dri/i965/Android.mk
+++ b/src/mesa/drivers/dri/i965/Android.mk
@@ -35,6 +35,11 @@ include $(LOCAL_PATH)/Makefile.sources
 LOCAL_CFLAGS := \
 	$(MESA_DRI_CFLAGS)
 
+ifeq ($(ARCH_X86_HAVE_SSE4_1),true)
+LOCAL_CFLAGS += \
+	-DUSE_SSE41
+endif
+
 LOCAL_C_INCLUDES := \
 	$(i965_INCLUDES) \
 	$(MESA_DRI_C_INCLUDES) \
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index b36ffc7..1691b15 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -2270,8 +2270,10 @@ intel_miptree_map(struct brw_context *brw,
               mt->bo->size >= brw->max_gtt_map_object_size) {
       assert(can_blit_slice(mt, level, slice));
       intel_miptree_map_blit(brw, mt, map, level, slice);
+#if defined(USE_SSE41)
    } else if (!(mode & GL_MAP_WRITE_BIT) && !mt->compressed && cpu_has_sse4_1) {
       intel_miptree_map_movntdqa(brw, mt, map, level, slice);
+#endif
    } else {
       intel_miptree_map_gtt(brw, mt, map, level, slice);
    }
-- 
2.0.2