[Mesa-stable] New stable-branch 10.5 candidate pushed
Emil Velikov
emil.l.velikov at gmail.com
Thu Mar 12 06:50:43 PDT 2015
Hello list,
The candidate for the Mesa 10.5.1 is now available. The current patch queue
is as follows:
- 57 queued
- 3 nominated (outstanding)
- and 2 rejected (obsolete) patches
This provides us with over a dozen i965 fixes for all over the driver, some
r300g ones (correct handling of RGTC1 and LATC1 formats, fixed sRGB blits)
and improvements in the freedreno compiler along side with fixed rendering
in Xonotic and others.
Take a look at section "Mesa stable queue" for more information.
Testing
-------
The following results are against piglit 305ecc3ac89.
Changes - classic i965(snb)
---------------------------
None.
Changes - swrast classic
------------------------
None.
Changes - gallium softpipe, llvmpipe (LLVM 3.5.1)
------------------------------------
None.
Testing reports/general approval
--------------------------------
Any testing reports (or general approval of the state of the branch)
will be greatly appreciated.
Trivial merge conflicts
-----------------------
Here are the commits where I manually merged conflicts, so these might
merit additional review:
commit 31fcb21ef523434a254c0bbff515345c2c6d8152
Author: Matt Turner <mattst88 at gmail.com>
i965: Avoid applying negate to wrong MAD source.
(cherry picked from commit d528907fd2950c7bb968fff66dd79863cd128890)
commit c3fc8b2870668fe0313fd35b2789306dbf3b9594
Author: Kenneth Graunke <kenneth at whitecape.org>
i965/fs: Set force_writemask_all on shader_time instructions.
(cherry picked from commit ef9cc7d0c176669c03130abf576f2b700be39514)
commit 82ef4994ddc0222241b101bcda8e729e729d93b0
Author: Kenneth Graunke <kenneth at whitecape.org>
i965/fs: Set smear on shader_time diff register.
(cherry picked from commit f1adc45dbe649cdd4538fb96f6d2a27328bbfba1)
commit c232d765affc06cc6e81ddee07656919e7f17aa5
Author: Kenneth Graunke <kenneth at whitecape.org>
i965/fs: Make emit_shader_time_end() insert before EOT.
(cherry picked from commit 4ebeb71573ad44f7657810dc5dd2c9030e3e63db)
commit fbd06fe65c0fe57f0dea96c87d9f0eb5abc72bb7
Author: Kenneth Graunke <kenneth at whitecape.org>
i965/fs: Don't issue FB writes for bound but unwritten color targets.
(cherry picked from commit e95969cd9548033250ba12f2adf11740319b41e7)
The plan is to have 10.5.1 this Friday(13th March).
If you have any questions or comments that you would like to share
before the release, please go ahead.
Cheers,
Emil
Mesa stable queue
-----------------
Nominated (3)
=============
Anuj Phogat (1):
glsl: Generate link error for non-matching gl_FragCoord redeclarations
Brian Paul (1):
configure: don't try to build gallium DRI drivers if --disable-dri is set
Mario Kleiner (1):
glx: Handle out-of-sequence swap completion events correctly.
Rejected (2)
============
Laura Ekstrand (2):
common: Correct texture init for meta pbo uploads and downloads.
common: Correct PBO 2D_ARRAY handling.
Queued (57)
===========
Andrey Sudnik (1):
i965/vec4: Don't lose the saturate modifier in copy propagation.
Chris Forbes (1):
i965/gs: Check newly-generated GS-out VUE map against correct stage
Daniel Stone (1):
egl: Take alpha bits into account when selecting GBM formats
Emil Velikov (4):
docs: Add sha256 sums for the 10.5.0 release
egl/main: no longer export internal function
cherry-ignore: ignore a few more commits picked without -x
mapi: fix commit 90411b56f6bc817e229d8801ac0adad6d4e3fb7a
Frank Henigman (1):
intel: fix EGLImage renderbuffer _BaseFormat
Iago Toral Quiroga (1):
i965: Fix out-of-bounds accesses into pull_constant_loc array
Ian Romanick (1):
i965/fs/nir: Use emit_math for nir_op_fpow
Ilia Mirkin (3):
freedreno: move fb state copy after checking for size change
freedreno/ir3: fix array count returned by TXQ
freedreno/ir3: get the # of miplevels from getinfo
Jason Ekstrand (2):
meta/TexSubImage: Stash everything other than PIXEL_TRANSFER/store in meta_begin
main/base_tex_format: Properly handle STENCIL_INDEX1/4/16
Kenneth Graunke (8):
i965: Split Gen4-5 BlitFramebuffer code; prefer BLT over Meta.
glsl: Mark array access when copying to a temporary for the ?: operator.
i965/fs: Set force_writemask_all on shader_time instructions.
i965/fs: Set smear on shader_time diff register.
i965/fs: Make emit_shader_time_write return rather than emit.
i965/fs: Make get_timestamp() pass back the MOV rather than emitting it.
i965/fs: Make emit_shader_time_end() insert before EOT.
i965/fs: Don't issue FB writes for bound but unwritten color targets.
Laura Ekstrand (2):
main: Fix target checking for CompressedTexSubImage*D.
main: Fix target checking for CopyTexSubImage*D.
Marc-Andre Lureau (1):
gallium/auxiliary/indices: fix start param
Marek Olšák (3):
r300g: fix RGTC1 and LATC1 SNORM formats
r300g: fix a crash when resolving into an sRGB texture
r300g: fix sRGB->sRGB blits
Matt Turner (12):
i965/vec4: Fix implementation of i2b.
mesa: Indent break statements and add a missing one.
mesa: Free memory allocated for luminance in readpixels.
mesa: Correct backwards NULL check.
i965: Consider scratch writes to have side effects.
i965/fs: Don't use backend_visitor::instructions after creating the CFG.
r300g: Use PATH_MAX instead of limiting ourselves to 100 chars.
r300g: Check return value of snprintf().
i965/fs: Don't propagate cmod to inst with different type.
i965: Tell intel_get_memcpy() which direction the memcpy() is going.
Revert SHA1 additions.
i965: Avoid applying negate to wrong MAD source.
Neil Roberts (4):
meta: In pbo_{Get,}TexSubImage don't repeatedly rebind the source tex
Revert "common: Fix PBOs for 1D_ARRAY."
meta: Allow GL_UN/PACK_IMAGE_HEIGHT in _mesa_meta_pbo_Get/TexSubImage
meta: Fix the y offset for 1D_ARRAY in _mesa_meta_pbo_TexSubImage
Rob Clark (11):
freedreno/ir3: fix silly typo for binning pass shaders
freedreno/a2xx: fix increment in assert
freedreno/a4xx: bit of cleanup
freedreno: update generated headers
freedreno/a4xx: set PC_PRIM_VTX_CNTL.VAROUT properly
freedreno: update generated headers
freedreno/a4xx: aniso filtering
freedreno/ir3: fix up cat6 instruction encodings
freedreno/ir3: add support for memory (cat6) instructions
freedreno/ir3: handle flat bypass for a4xx
freedreno/ir3: fix failed assert in grouping
Stefan Dösinger (1):
r300g: Fix the ATI1N swizzle (RGTC1 and LATC1)
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