[Mesa-stable] [PATCH 2/3] i965: Set subslice_total on Haswell.

[Francisco Jerez]

Kenneth Graunke <kenneth at whitecape.org> writes:

> We'll use this for compute shader thread counts shortly.
>
> Cc: "12.0" <mesa-stable at lists.freedesktop.org>
> Signed-off-by: Kenneth Graunke <kenneth at whitecape.org>
> ---
>  src/mesa/drivers/dri/i965/intel_screen.c | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> I'm not sure whether I want to commit this or not...there still seem to
> be some issues on Haswell.  I think this is right, but maybe there are
> just other bugs.
>
Yeah, I believe the formula below should work for the time being until
the kernel is fixed to support the right get-params on Gen7.  I wonder
though what should we do on IVB?  AFAIK IVB GT2 had two subslices rather
than one, but if you simply multiply the current max_cs_threads value by
the number of subslices you'll go over the total thread count of the
GPU.  The current max_cs_threads value for IVB GT2 seems bogus AFAICT,
it's higher than the thread count per subslice (48?) but lower than the
total thread count (96).  I wonder if barriers are broken on IVB right
now for large enough workgroup size.

> diff --git a/src/mesa/drivers/dri/i965/intel_screen.c b/src/mesa/drivers/dri/i965/intel_screen.c
> index fb06e25..9ed4da6 100644
> --- a/src/mesa/drivers/dri/i965/intel_screen.c
> +++ b/src/mesa/drivers/dri/i965/intel_screen.c
> @@ -1565,8 +1565,11 @@ __DRIconfig **intelInitScreen2(__DRIscreen *psp)
>     intelScreen->hw_has_timestamp = intel_detect_timestamp(intelScreen);
>  
>     /* GENs prior to 8 do not support EU/Subslice info */
> -   if (intelScreen->devinfo->gen >= 8)
> +   if (intelScreen->devinfo->gen >= 8) {
>        intel_detect_sseu(intelScreen);
> +   } else if (intelScreen->devinfo->is_haswell) {
> +      intelScreen->subslice_total = 1 << (intelScreen->devinfo->gt - 1);
> +   }
>  
>     const char *force_msaa = getenv("INTEL_FORCE_MSAA");
>     if (force_msaa) {
> -- 
> 2.8.3
>
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