[Mesa-stable] [PATCH v2 1/2] i965/vec4: fix swizzle and writemask when loading an uniform with constant offset

[Samuel Iglesias Gonsálvez]

On Tue, 2017-05-02 at 12:23 -0700, Francisco Jerez wrote:
> Samuel Iglesias Gonsálvez <siglesias at igalia.com> writes:
> 
> > El Viernes, 28 de abril de 2017 16:08:35 Francisco Jerez escribió:
> > > Samuel Iglesias Gonsálvez <siglesias at igalia.com> writes:
> > > > It was setting XYWZ swizzle and writemask to all uniforms, no
> > > > matter if
> > > > they were a vector or scalar, so this can lead to problems when
> > > > loading
> > > > them to the push constant buffer.
> > > > 
> > > > Moreover, 'shift' calculation was designed to calculate the
> > > > offset in
> > > > DWORDS, but it doesn't take into account DFs, so the calculated
> > > > swizzle
> > > > for the later ones was wrong.
> > > > 
> > > > The indirect case is not changed because MOV INDIRECT will
> > > > write
> > > > to all components. Added an assert to verify that these
> > > > uniforms
> > > > are aligned.
> > > > 
> > > > v2:
> > > > - Fix 'shift' calculation (Curro)
> > > > - Set both swizzle and writemask.
> > > > - Add assert(shift == 0) for the indirect case.
> > > > 
> > > > Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> > > > Cc: "17.1" <mesa-stable at lists.freedesktop.org>
> > > 
> > > Reviewed-by: Francisco Jerez <currojerez at riseup.net>
> > > 
> > 
> > Thanks!
> > 
> > What about the second patch? Is it OK for you?
> > 
> 
> Not 100% certain it's doing the right thing, but feel free to add my:
> 
> Acked-by: Francisco Jerez <currojerez at riseup.net>
> 
> to PATCH 2 of this series.
> 

Actually, it was not doing the thing I though it would do: it was
working because I was assigning consecutive locations but all the
intended logic was broken :-(

I will send a new version of the patch today fixing this for review, so
it can enter into the mesa release. This new patch does not optimise
the use of the slots (vec4-size) in the push constant buffer, meaning
that each uniform will "use" the whole slot (or two consecutive slots
in case of dvec3/dvec4) as it was done before the first patch of this
series; i.e. the channels used are always 4 per slot, but I use the
swizzle and writemask set by this first patch of the series only to
identify dvec3 and dvec4 uniforms, in order to align them properly.

I will add a comment saying what should be done to add that
optimisation, so this can be done in a follow-up patch after the
release.

Sam

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