[Mesa-stable] [Mesa-dev] [PATCH] i965: Don't emit 3DSTATE_SAMPLER_STATE_POINTERS_VS for compute shaders.

[Jordan Justen]

Reviewed-by: Jordan Justen <jordan.l.justen at intel.com>

On 2017-10-31 01:58:41, Kenneth Graunke wrote:
> For the render pipeline, the upload_sampler_state_table atom emits
> 3DSTATE_BINDING_TABLE_POINTERS_XS.  It tries to avoid this for compute:
> 
>    if (GEN_GEN >= 7 && stage_state->stage != MESA_SHADER_COMPUTE) {
>       /* Emit a 3DSTATE_SAMPLER_STATE_POINTERS_XS packet. */
>       genX(emit_sampler_state_pointers_xs)(brw, stage_state);
>    } ...
> 
> However, we were failing to initialize brw->cs.base.stage, so it was
> left as 0 (MESA_SHADER_VERTEX), causing this condition to break.  We
> then emitted 3DSTATE_SAMPLER_STATE_POINTERS_VS in GPGPU mode, when
> trying to upload CS samplers.  Nothing good can come of this.
> 
> Cc: mesa-stable at lists.freedesktop.org
> ---
>  src/mesa/drivers/dri/i965/brw_context.c | 1 +
>  1 file changed, 1 insertion(+)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_context.c b/src/mesa/drivers/dri/i965/brw_context.c
> index eed42468b11..95b00bf8fce 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.c
> +++ b/src/mesa/drivers/dri/i965/brw_context.c
> @@ -874,6 +874,7 @@ brwCreateContext(gl_api api,
>     brw->tes.base.stage = MESA_SHADER_TESS_EVAL;
>     brw->gs.base.stage = MESA_SHADER_GEOMETRY;
>     brw->wm.base.stage = MESA_SHADER_FRAGMENT;
> +   brw->cs.base.stage = MESA_SHADER_COMPUTE;
>     if (devinfo->gen >= 8) {
>        brw->vtbl.emit_depth_stencil_hiz = gen8_emit_depth_stencil_hiz;
>     } else if (devinfo->gen >= 7) {
> -- 
> 2.15.0
> 
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