[Mesa-stable] [Mesa-dev] [PATCH 17/21] intel/nir: Add a helper for getting the NoIndirect mask

[Timothy Arceri]

On 11/11/17 12:28, Andres Gomez wrote:
> Jason, this series of nominated commits landed without mentioning any
> specific stable queue.
> 
>  From what I'm seeing, they depend on 379b24a40d3 which didn't make it
> for 17.2 so I'm dropping the 3 of them for that queue:
> 
> 7364f080f9a272323ed3491f278a1eed3eb9b1a7 (intel/nir: Add a helper for getting the NoIndirect mask)
> 3e63cf893f096a7263eb1856d58417dd2d170d4b (intel/nir: Break the linking code into a helper in brw_nir.c)
> 951a5dc4cc29da996b54ae63eeba1915a3a65b4a (intel/nir: Use the correct indirect lowering masks in link_shaders)
> 
> Let me know what you think.

Yeah these should only be needed in 17.3

> 
> 
> On Sat, 2017-10-28 at 11:36 -0700, Jason Ekstrand wrote:
>> Cc: mesa-stable at lists.freedesktop.org
>> ---
>>   src/intel/compiler/brw_nir.c | 33 +++++++++++++++++++--------------
>>   1 file changed, 19 insertions(+), 14 deletions(-)
>>
>> diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c
>> index e5ff6de..2d4ab50 100644
>> --- a/src/intel/compiler/brw_nir.c
>> +++ b/src/intel/compiler/brw_nir.c
>> @@ -521,18 +521,29 @@ brw_nir_lower_cs_shared(nir_shader *nir)
>>      this_progress;                                          \
>>   })
>>   
>> -nir_shader *
>> -brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
>> -                 bool is_scalar)
>> +static nir_variable_mode
>> +brw_nir_no_indirect_mask(const struct brw_compiler *compiler,
>> +                         gl_shader_stage stage)
>>   {
>>      nir_variable_mode indirect_mask = 0;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectInput)
>> +
>> +   if (compiler->glsl_compiler_options[stage].EmitNoIndirectInput)
>>         indirect_mask |= nir_var_shader_in;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectOutput)
>> +   if (compiler->glsl_compiler_options[stage].EmitNoIndirectOutput)
>>         indirect_mask |= nir_var_shader_out;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectTemp)
>> +   if (compiler->glsl_compiler_options[stage].EmitNoIndirectTemp)
>>         indirect_mask |= nir_var_local;
>>   
>> +   return indirect_mask;
>> +}
>> +
>> +nir_shader *
>> +brw_nir_optimize(nir_shader *nir, const struct brw_compiler *compiler,
>> +                 bool is_scalar)
>> +{
>> +   nir_variable_mode indirect_mask =
>> +      brw_nir_no_indirect_mask(compiler, nir->info.stage);
>> +
>>      bool progress;
>>      do {
>>         progress = false;
>> @@ -639,14 +650,8 @@ brw_preprocess_nir(const struct brw_compiler *compiler, nir_shader *nir)
>>   
>>      OPT(nir_lower_clip_cull_distance_arrays);
>>   
>> -   nir_variable_mode indirect_mask = 0;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectInput)
>> -      indirect_mask |= nir_var_shader_in;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectOutput)
>> -      indirect_mask |= nir_var_shader_out;
>> -   if (compiler->glsl_compiler_options[nir->info.stage].EmitNoIndirectTemp)
>> -      indirect_mask |= nir_var_local;
>> -
>> +   nir_variable_mode indirect_mask =
>> +      brw_nir_no_indirect_mask(compiler, nir->info.stage);
>>      nir_lower_indirect_derefs(nir, indirect_mask);
>>   
>>      nir_lower_int64(nir, nir_lower_imul64 |