[Mesa-stable] [Mesa-dev] [PATCH 3/4] i965: Replace draw_aux_buffer_disabled with draw_aux_usage
Pohjolainen, Topi
topi.pohjolainen at gmail.com
Wed Jan 24 13:36:42 UTC 2018
On Wed, Jan 24, 2018 at 02:03:41AM -0800, Jason Ekstrand wrote:
> Instead of keeping an array of booleans, we now hang onto an array of
> isl_aux_usage enums. This means that the thing we are passing from
> brw_draw.c to surface state setup is the thing that surface state setup
> actually needs instead of an input to compute what it needs.
If you like you could add a word or two that tracking in the context is now
maintained in single point in brw_predraw_resolve_framebuffer() instead of in
intel_disable_rb_aux_buffer() which gets called from multiple locations.
Anyway, ugly becomes less so:
Reviewed-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
>
> Cc: mesa-stable at lists.freedesktop.org
> ---
> src/mesa/drivers/dri/i965/brw_compute.c | 2 +-
> src/mesa/drivers/dri/i965/brw_context.h | 15 +++++------
> src/mesa/drivers/dri/i965/brw_draw.c | 32 ++++++++++++------------
> src/mesa/drivers/dri/i965/brw_wm_surface_state.c | 12 +++------
> 4 files changed, 27 insertions(+), 34 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_compute.c b/src/mesa/drivers/dri/i965/brw_compute.c
> index 9be7523..5ce899b 100644
> --- a/src/mesa/drivers/dri/i965/brw_compute.c
> +++ b/src/mesa/drivers/dri/i965/brw_compute.c
> @@ -177,7 +177,7 @@ brw_dispatch_compute_common(struct gl_context *ctx)
>
> brw_validate_textures(brw);
>
> - brw_predraw_resolve_inputs(brw, false);
> + brw_predraw_resolve_inputs(brw, false, NULL);
>
> /* Flush the batch if the batch/state buffers are nearly full. We can
> * grow them if needed, but this is not free, so we'd like to avoid it.
> diff --git a/src/mesa/drivers/dri/i965/brw_context.h b/src/mesa/drivers/dri/i965/brw_context.h
> index 4b78508..9046acd 100644
> --- a/src/mesa/drivers/dri/i965/brw_context.h
> +++ b/src/mesa/drivers/dri/i965/brw_context.h
> @@ -1290,15 +1290,11 @@ struct brw_context
>
> struct brw_fast_clear_state *fast_clear_state;
>
> - /* Array of flags telling if auxiliary buffer is disabled for corresponding
> - * renderbuffer. If draw_aux_buffer_disabled[i] is set then use of
> - * auxiliary buffer for gl_framebuffer::_ColorDrawBuffers[i] is
> - * disabled.
> - * This is needed in case the same underlying buffer is also configured
> - * to be sampled but with a format that the sampling engine can't treat
> - * compressed or fast cleared.
> + /* Array of aux usages to use for drawing. Aux usage for render targets is
> + * a bit more complex than simply calling a single function so we need some
> + * way of passing it form brw_draw.c to surface state setup.
> */
> - bool draw_aux_buffer_disabled[MAX_DRAW_BUFFERS];
> + enum isl_aux_usage draw_aux_usage[MAX_DRAW_BUFFERS];
>
> __DRIcontext *driContext;
> struct intel_screen *screen;
> @@ -1324,7 +1320,8 @@ void intel_update_renderbuffers(__DRIcontext *context,
> __DRIdrawable *drawable);
> void intel_prepare_render(struct brw_context *brw);
>
> -void brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering);
> +void brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
> + bool *draw_aux_buffer_disabled);
>
> void intel_resolve_for_dri2_flush(struct brw_context *brw,
> __DRIdrawable *drawable);
> diff --git a/src/mesa/drivers/dri/i965/brw_draw.c b/src/mesa/drivers/dri/i965/brw_draw.c
> index 2606360..434dd75 100644
> --- a/src/mesa/drivers/dri/i965/brw_draw.c
> +++ b/src/mesa/drivers/dri/i965/brw_draw.c
> @@ -341,6 +341,7 @@ brw_merge_inputs(struct brw_context *brw,
> */
> static bool
> intel_disable_rb_aux_buffer(struct brw_context *brw,
> + bool *draw_aux_buffer_disabled,
> struct intel_mipmap_tree *tex_mt,
> unsigned min_level, unsigned num_levels,
> const char *usage)
> @@ -360,7 +361,7 @@ intel_disable_rb_aux_buffer(struct brw_context *brw,
> if (irb && irb->mt->bo == tex_mt->bo &&
> irb->mt_level >= min_level &&
> irb->mt_level < min_level + num_levels) {
> - found = brw->draw_aux_buffer_disabled[i] = true;
> + found = draw_aux_buffer_disabled[i] = true;
> }
> }
>
> @@ -393,14 +394,12 @@ mark_textures_used_for_txf(BITSET_WORD *used_for_txf,
> * enabled depth texture, and flush the render cache for any dirty textures.
> */
> void
> -brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering)
> +brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering,
> + bool *draw_aux_buffer_disabled)
> {
> struct gl_context *ctx = &brw->ctx;
> struct intel_texture_object *tex_obj;
>
> - memset(brw->draw_aux_buffer_disabled, 0,
> - sizeof(brw->draw_aux_buffer_disabled));
> -
> BITSET_DECLARE(used_for_txf, MAX_COMBINED_TEXTURE_IMAGE_UNITS);
> memset(used_for_txf, 0, sizeof(used_for_txf));
> if (rendering) {
> @@ -441,7 +440,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering)
> }
>
> const bool disable_aux = rendering &&
> - intel_disable_rb_aux_buffer(brw, tex_obj->mt, min_level, num_levels,
> + intel_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled,
> + tex_obj->mt, min_level, num_levels,
> "for sampling");
>
> intel_miptree_prepare_texture(brw, tex_obj->mt, view_format,
> @@ -483,7 +483,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering)
>
> if (tex_obj && tex_obj->mt) {
> if (rendering) {
> - intel_disable_rb_aux_buffer(brw, tex_obj->mt, 0, ~0,
> + intel_disable_rb_aux_buffer(brw, draw_aux_buffer_disabled,
> + tex_obj->mt, 0, ~0,
> "as a shader image");
> }
>
> @@ -497,7 +498,8 @@ brw_predraw_resolve_inputs(struct brw_context *brw, bool rendering)
> }
>
> static void
> -brw_predraw_resolve_framebuffer(struct brw_context *brw)
> +brw_predraw_resolve_framebuffer(struct brw_context *brw,
> + bool *draw_aux_buffer_disabled)
> {
> struct gl_context *ctx = &brw->ctx;
> struct intel_renderbuffer *depth_irb;
> @@ -550,7 +552,8 @@ brw_predraw_resolve_framebuffer(struct brw_context *brw)
> enum isl_aux_usage aux_usage =
> intel_miptree_render_aux_usage(brw, irb->mt, isl_format,
> blend_enabled,
> - brw->draw_aux_buffer_disabled[i]);
> + draw_aux_buffer_disabled[i]);
> + brw->draw_aux_usage[i] = aux_usage;
>
> intel_miptree_prepare_render(brw, irb->mt, irb->mt_level,
> irb->mt_layer, irb->layer_count,
> @@ -623,11 +626,7 @@ brw_postdraw_set_buffers_need_resolve(struct brw_context *brw)
> mesa_format mesa_format =
> _mesa_get_render_format(ctx, intel_rb_format(irb));
> enum isl_format isl_format = brw_isl_format_for_mesa_format(mesa_format);
> - bool blend_enabled = ctx->Color.BlendEnabled & (1 << i);
> - enum isl_aux_usage aux_usage =
> - intel_miptree_render_aux_usage(brw, irb->mt, isl_format,
> - blend_enabled,
> - brw->draw_aux_buffer_disabled[i]);
> + enum isl_aux_usage aux_usage = brw->draw_aux_usage[i];
>
> brw_render_cache_add_bo(brw, irb->mt->bo, isl_format, aux_usage);
>
> @@ -736,8 +735,9 @@ brw_prepare_drawing(struct gl_context *ctx,
> * and finalizing textures but before setting up any hardware state for
> * this draw call.
> */
> - brw_predraw_resolve_inputs(brw, true);
> - brw_predraw_resolve_framebuffer(brw);
> + bool draw_aux_buffer_disabled[MAX_DRAW_BUFFERS] = { };
> + brw_predraw_resolve_inputs(brw, true, draw_aux_buffer_disabled);
> + brw_predraw_resolve_framebuffer(brw, draw_aux_buffer_disabled);
>
> /* Bind all inputs, derive varying and size information:
> */
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index fd2ee36..38ff1ef 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -229,11 +229,6 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
> }
> enum isl_format isl_format = brw->mesa_to_isl_render_format[rb_format];
>
> - enum isl_aux_usage aux_usage =
> - intel_miptree_render_aux_usage(brw, mt, isl_format,
> - ctx->Color.BlendEnabled & (1 << unit),
> - brw->draw_aux_buffer_disabled[unit]);
> -
> struct isl_view view = {
> .format = isl_format,
> .base_level = irb->mt_level - irb->mt->first_level,
> @@ -245,7 +240,8 @@ gen6_update_renderbuffer_surface(struct brw_context *brw,
> };
>
> uint32_t offset;
> - brw_emit_surface_state(brw, mt, mt->target, view, aux_usage,
> + brw_emit_surface_state(brw, mt, mt->target, view,
> + brw->draw_aux_usage[unit],
> &offset, surf_index,
> RELOC_WRITE);
> return offset;
> @@ -452,7 +448,7 @@ brw_aux_surface_disabled(const struct brw_context *brw,
> intel_renderbuffer(fb->_ColorDrawBuffers[i]);
>
> if (irb && irb->mt == mt)
> - return brw->draw_aux_buffer_disabled[i];
> + return brw->draw_aux_usage[i] == ISL_AUX_USAGE_NONE;
> }
>
> return false;
> @@ -1069,7 +1065,7 @@ update_renderbuffer_read_surfaces(struct brw_context *brw)
>
> enum isl_aux_usage aux_usage =
> intel_miptree_texture_aux_usage(brw, irb->mt, format);
> - if (brw->draw_aux_buffer_disabled[i])
> + if (brw->draw_aux_usage[i] == ISL_AUX_USAGE_NONE)
> aux_usage = ISL_AUX_USAGE_NONE;
>
> brw_emit_surface_state(brw, irb->mt, target, view, aux_usage,
> --
> 2.5.0.400.gff86faf
>
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