[Mesa-stable] [PATCH 3/3] i965/miptree: Use the correct BLT pitch

[Nanley Chery]

On Fri, Jul 20, 2018 at 02:48:58PM -0700, Dylan Baker wrote:
> Hi Nanley,
> 
> This applies cleanly to the 18.1 branch, but there is something else missing as
> it adds roughly 2200 regressions, see here:
> http://otc-mesa-ci.jf.intel.com/view/dev/job/dcbaker_18.1/66/testReport/
> 
> For the moment I've reverted it out of the staging/18.1 branch. If we need to
> get it back in we can, but we need to sort out those regressions first.
> 

Thanks for letting me know. I guess I didn't figure out how to do stable
testing after all. I think I found the issue and am running the fix
through jenkins (rebuild of the job above and a mesa_master build).

-Nanley

> Dylan
> 
> Quoting Nanley Chery (2018-07-12 10:28:16)
> > Retile miptrees to a linear tiling less often. Retiling can cause issues
> > with imported BOs.
> > 
> > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=106738
> > Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
> > Cc: <mesa-stable at lists.freedesktop.org>
> > ---
> >  src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 12 ++++++------
> >  1 file changed, 6 insertions(+), 6 deletions(-)
> > 
> > diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > index 53e01120a92..1ddb945b085 100644
> > --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> > @@ -509,7 +509,7 @@ free_aux_state_map(enum isl_aux_state **state)
> >  }
> >  
> >  static bool
> > -need_to_retile_as_linear(struct brw_context *brw, unsigned row_pitch,
> > +need_to_retile_as_linear(struct brw_context *brw, unsigned blt_pitch,
> >                           enum isl_tiling tiling, unsigned samples)
> >  {
> >     if (samples > 1)
> > @@ -518,9 +518,9 @@ need_to_retile_as_linear(struct brw_context *brw, unsigned row_pitch,
> >     if (tiling == ISL_TILING_LINEAR)
> >        return false;
> >  
> > -   if (ALIGN(row_pitch, 512) >= 32768) {
> > -      perf_debug("row pitch %u too large to blit, falling back to untiled",
> > -                 row_pitch);
> > +   if (blt_pitch >= 32768) {
> > +      perf_debug("blt pitch %u too large to blit, falling back to untiled",
> > +                 blt_pitch);
> >        return true;
> >     }
> >  
> > @@ -600,7 +600,7 @@ make_surface(struct brw_context *brw, GLenum target, mesa_format format,
> >     bool is_depth_stencil =
> >        mt->surf.usage & (ISL_SURF_USAGE_STENCIL_BIT | ISL_SURF_USAGE_DEPTH_BIT);
> >     if (!is_depth_stencil) {
> > -      if (need_to_retile_as_linear(brw, mt->surf.row_pitch,
> > +      if (need_to_retile_as_linear(brw, intel_miptree_blt_pitch(mt),
> >                                     mt->surf.tiling, mt->surf.samples)) {
> >           init_info.tiling_flags = 1u << ISL_TILING_LINEAR;
> >           if (!isl_surf_init_s(&brw->isl_dev, &mt->surf, &init_info))
> > @@ -3577,7 +3577,7 @@ can_blit_slice(struct intel_mipmap_tree *mt,
> >                 unsigned int level, unsigned int slice)
> >  {
> >     /* See intel_miptree_blit() for details on the 32k pitch limit. */
> > -   if (mt->surf.row_pitch >= 32768)
> > +   if (intel_miptree_blt_pitch(mt) >= 32768)
> >        return false;
> >  
> >     return true;
> > -- 
> > 2.18.0
> > 
> > _______________________________________________
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> > mesa-stable at lists.freedesktop.org
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