[Mesa-stable] [Mesa-dev] [PATCH 1/8] radv: don't flush src stages when dstStageMask == BOTTOM_OF_PIPE

Bas Nieuwenhuizen bas at basnieuwenhuizen.nl
Wed Jun 27 00:11:12 UTC 2018


Don't we still need this when having layout transitions?

On Tue, Jun 26, 2018 at 11:49 PM, Fredrik Höglund <fredrik at kde.org> wrote:
> The Vulkan specification says:
>
>    "An execution dependency with only VK_PIPELINE_STAGE_BOTTOM_OF_-
>     PIPE_BIT in the destination stage mask [...] does not delay
>     processing of subsequent commands."
>
> Cc: <mesa-stable at lists.freedesktop.org>
> Signed-off-by: Fredrik Höglund <fredrik at kde.org>
> ---
>  src/amd/vulkan/radv_cmd_buffer.c | 3 ++-
>  src/amd/vulkan/radv_pass.c       | 6 ++++--
>  2 files changed, 6 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c
> index 110a9a960a9..5bfcba28d83 100644
> --- a/src/amd/vulkan/radv_cmd_buffer.c
> +++ b/src/amd/vulkan/radv_cmd_buffer.c
> @@ -4197,7 +4197,8 @@ void radv_CmdPipelineBarrier(
>                                                         image);
>         }
>
> -       radv_stage_flush(cmd_buffer, srcStageMask);
> +       if (destStageMask != VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT)
> +               radv_stage_flush(cmd_buffer, srcStageMask);
>         cmd_buffer->state.flush_bits |= src_flush_bits;
>
>         for (uint32_t i = 0; i < imageMemoryBarrierCount; i++) {
> diff --git a/src/amd/vulkan/radv_pass.c b/src/amd/vulkan/radv_pass.c
> index 15fee444cdc..7a0dca09496 100644
> --- a/src/amd/vulkan/radv_pass.c
> +++ b/src/amd/vulkan/radv_pass.c
> @@ -174,11 +174,13 @@ VkResult radv_CreateRenderPass(
>         for (unsigned i = 0; i < pCreateInfo->dependencyCount; ++i) {
>                 uint32_t dst = pCreateInfo->pDependencies[i].dstSubpass;
>                 if (dst == VK_SUBPASS_EXTERNAL) {
> -                       pass->end_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask;
> +                       if (pCreateInfo->pDependencies[i].dstStageMask != VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT)
> +                               pass->end_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask;
>                         pass->end_barrier.src_access_mask = pCreateInfo->pDependencies[i].srcAccessMask;
>                         pass->end_barrier.dst_access_mask = pCreateInfo->pDependencies[i].dstAccessMask;
>                 } else {
> -                       pass->subpasses[dst].start_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask;
> +                       if (pCreateInfo->pDependencies[i].dstStageMask != VK_PIPELINE_STAGE_BOTTOM_OF_PIPE_BIT)
> +                               pass->subpasses[dst].start_barrier.src_stage_mask = pCreateInfo->pDependencies[i].srcStageMask;
>                         pass->subpasses[dst].start_barrier.src_access_mask = pCreateInfo->pDependencies[i].srcAccessMask;
>                         pass->subpasses[dst].start_barrier.dst_access_mask = pCreateInfo->pDependencies[i].dstAccessMask;
>                 }
> --
> 2.17.0
>
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