[Mesa-stable] [Mesa-dev] [PATCH] winsys/amdgpu: add VCN JPEG to no user fence group

[Koenig, Christian]

Am 08.05.19 um 15:14 schrieb Liu, Leo:
> On 5/8/19 9:02 AM, Christian König wrote:
>> [CAUTION: External Email]
>>
>> Am 08.05.19 um 14:56 schrieb Liu, Leo:
>>> There is no user fence for JPEG, the bug triggering
>>> kernel WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT)
>> Oh, we are probably going to need to check for this in the kernel as
>> well.
>>
>> Currently we only check for UVD and VCE there,
> Are you talking about the checking for JPEG engine? if that, and then
> yes the check of " WARN_ON(flags & AMDGPU_FENCE_FLAG_64BIT)" is there,
> that's why current JPEG is triggering that.

Yeah, but this check comes way to late.

We usually already reject command submissions when they have user fences 
for UVD & VCE, see amdgpu_cs_ib_fill():
>         /* UVD & VCE fw doesn't support user fences */
>         ring = to_amdgpu_ring(parser->entity->rq->sched);
>         if (parser->job->uf_addr && (
>             ring->funcs->type == AMDGPU_RING_TYPE_UVD ||
>             ring->funcs->type == AMDGPU_RING_TYPE_VCE))
>                 return -EINVAL;

We should probably make that a ring flag or something like that and 
generalize he code here.

Then the WARN_ON in the JPEG fence code can be removed.

Christian.

>
>
> Regards,
>
> Leo
>
>
>> do you want to take a
>> look Leo or should I do this?
>>
>> Christian.
>>
>>> Signed-off-by: Leo Liu <leo.liu at amd.com>
>>> Cc: mesa-stable at lists.freedesktop.org
>>> ---
>>>    src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 3 ++-
>>>    1 file changed, 2 insertions(+), 1 deletion(-)
>>>
>>> diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>>> b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>>> index 4a2377f7e09..972030eaaa8 100644
>>> --- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>>> +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
>>> @@ -378,7 +378,8 @@ static bool amdgpu_cs_has_user_fence(struct
>>> amdgpu_cs_context *cs)
>>>              cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE &&
>>>              cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD_ENC &&
>>>              cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_DEC &&
>>> -          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC;
>>> +          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_ENC &&
>>> +          cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCN_JPEG;
>>>    }
>>>
>>>    static bool amdgpu_cs_has_chaining(struct amdgpu_cs *cs)