[Mesa-stable] [Mesa-dev] [PATCH] radeon/vcn: fix max poc for hevc encode
Liu, Leo
Leo.Liu at amd.com
Wed May 22 16:29:42 UTC 2019
On 5/17/19 7:54 PM, boyuan.zhang at amd.com wrote:
> [CAUTION: External Email]
>
> From: Boyuan Zhang <boyuan.zhang at amd.com>
>
> Fix max poc value with hardcoded value until new feature requires
> to change this in the future.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
> Cc: mesa-stable at lists.freedesktop.org
>
> Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
> ---
> src/gallium/drivers/radeon/radeon_vcn_enc.c | 4 +++-
> src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 1 -
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
> index 7d64a28a405..b8c73227929 100644
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
> @@ -72,7 +72,9 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
> enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
> enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
> enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
> - enc->enc_pic.max_poc = pic->seq.intra_period;
> + enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1;
> + enc->enc_pic.max_poc =
> + (enc->enc_pic.layer_ctrl.max_num_temporal_layers == 4) ? 32 : 16;
You have set "+ enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1;", why to check whether it's 4?
Regards,
Leo
> enc->enc_pic.log2_max_poc = 0;
> for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
> i = (i >> 1);
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> index 7f5b1909344..c489de39a89 100644
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> @@ -253,7 +253,6 @@ static void radeon_enc_session_init_hevc(struct radeon_encoder *enc)
>
> static void radeon_enc_layer_control(struct radeon_encoder *enc)
> {
> - enc->enc_pic.layer_ctrl.max_num_temporal_layers = 1;
> enc->enc_pic.layer_ctrl.num_temporal_layers = 1;
>
> RADEON_ENC_BEGIN(RENCODE_IB_PARAM_LAYER_CONTROL);
> --
> 2.17.1
>
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