[Mesa-stable] [Mesa-dev] [PATCH] radeon/vcn: fix poc for hevc encode
Liu, Leo
Leo.Liu at amd.com
Wed May 29 20:02:33 UTC 2019
These 2 patches are:
Acked-by: Leo Liu <leo.liu at amd.com>
On 5/29/19 2:41 PM, boyuan.zhang at amd.com wrote:
> From: Boyuan Zhang <boyuan.zhang at amd.com>
>
> MaxPicOrderCntLsb should be at least 16 according to the spec,
> therefore add minimum value check.
>
> Also use poc value passed from st instead of calculation
> in slice header encoding.
>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=110673
> Cc: mesa-stable at lists.freedesktop.org
>
> V2: Fix typo
>
> V3: Use MAX2 macro instead of coding. Also MaxPicOrderCntLsb
> should be power of 2 according to spec.
>
> Signed-off-by: Boyuan Zhang <boyuan.zhang at amd.com>
> ---
> src/gallium/drivers/radeon/radeon_vcn_enc.c | 3 ++-
> src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c | 2 +-
> 2 files changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc.c b/src/gallium/drivers/radeon/radeon_vcn_enc.c
> index 8f9af73c66..3651d8a86b 100644
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc.c
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc.c
> @@ -72,7 +72,8 @@ static void radeon_vcn_enc_get_param(struct radeon_encoder *enc, struct pipe_pic
> enc->enc_pic.general_tier_flag = pic->seq.general_tier_flag;
> enc->enc_pic.general_profile_idc = pic->seq.general_profile_idc;
> enc->enc_pic.general_level_idc = pic->seq.general_level_idc;
> - enc->enc_pic.max_poc = pic->seq.intra_period;
> + enc->enc_pic.max_poc =
> + MAX2(16, util_next_power_of_two(pic->seq.intra_period));
> enc->enc_pic.log2_max_poc = 0;
> for (int i = enc->enc_pic.max_poc; i != 0; enc->enc_pic.log2_max_poc++)
> i = (i >> 1);
> diff --git a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> index 7f5b190934..3302ed7524 100644
> --- a/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> +++ b/src/gallium/drivers/radeon/radeon_vcn_enc_1_2.c
> @@ -988,7 +988,7 @@ static void radeon_enc_slice_header_hevc(struct radeon_encoder *enc)
> }
>
> if ((enc->enc_pic.nal_unit_type != 19) && (enc->enc_pic.nal_unit_type != 20)) {
> - radeon_enc_code_fixed_bits(enc, enc->enc_pic.frame_num % enc->enc_pic.max_poc, enc->enc_pic.log2_max_poc);
> + radeon_enc_code_fixed_bits(enc, enc->enc_pic.pic_order_cnt, enc->enc_pic.log2_max_poc);
> if (enc->enc_pic.picture_type == PIPE_H264_ENC_PICTURE_TYPE_P)
> radeon_enc_code_fixed_bits(enc, 0x1, 1);
> else {
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