<p dir="ltr">Drp... There's more work to do here to get the behavior 100% correct on gen7 but this fixes a bug and is a step in the right direction.</p>
<p dir="ltr">Reviewed-by: Jason Ekstrand <<a href="mailto:jason@jlekstrand.net">jason@jlekstrand.net</a>></p>
<p dir="ltr">Unfortunately, gen7 is a bit crazy so the simple solution doesn't cover all the cases. For the full fix take a look at</p>
<p dir="ltr"><a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n74">https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n74</a></p>
<p dir="ltr">and</p>
<p dir="ltr"><a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n81">https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n81</a></p>
<p dir="ltr">and maybe</p>
<p dir="ltr"><a href="https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n119">https://cgit.freedesktop.org/mesa/mesa/tree/src/mesa/drivers/dri/i965/gen7_wm_state.c#n119</a></p>
<p dir="ltr">--Jason</p>
<div class="gmail_extra"><br><div class="gmail_quote">On Aug 4, 2016 4:45 PM, "Nanley Chery" <<a href="mailto:nanleychery@gmail.com">nanleychery@gmail.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">According to the IVB PRM Vol2 P1, this bit must be set if a pixel shader<br>
contains a discard instruction.<br>
<br>
Bugzilla: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=97207" rel="noreferrer" target="_blank">https://bugs.freedesktop.org/<wbr>show_bug.cgi?id=97207</a><br>
Cc: "12.0" <<a href="mailto:mesa-stable@lists.freedesktop.org">mesa-stable@lists.<wbr>freedesktop.org</a>><br>
Signed-off-by: Nanley Chery <<a href="mailto:nanley.g.chery@intel.com">nanley.g.chery@intel.com</a>><br>
---<br>
src/intel/vulkan/gen7_<wbr>pipeline.c | 1 +<br>
1 file changed, 1 insertion(+)<br>
<br>
diff --git a/src/intel/vulkan/gen7_<wbr>pipeline.c b/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
index 8ce50be..d1b18e0 100644<br>
--- a/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
+++ b/src/intel/vulkan/gen7_<wbr>pipeline.c<br>
@@ -297,6 +297,7 @@ genX(graphics_pipeline_create)<wbr>(<br>
wm.<wbr>LineEndCapAntialiasingRegionWi<wbr>dth = 0; /* 0.5 pixels */<br>
wm.LineAntialiasingRegionWidth = 1; /* 1.0 pixels */<br>
wm.PointRasterizationRule = RASTRULE_UPPER_RIGHT;<br>
+ wm.PixelShaderKillPixel = wm_prog_data->uses_kill;<br>
wm.<wbr>PixelShaderComputedDepthMode = wm_prog_data->computed_depth_<wbr>mode;<br>
wm.PixelShaderUsesSourceDepth = wm_prog_data->uses_src_depth;<br>
wm.PixelShaderUsesSourceW = wm_prog_data->uses_src_w;<br>
--<br>
2.9.0<br>
<br>
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</blockquote></div></div>