<div dir="auto">These all need to go into 17.0</div><div class="gmail_extra"><br><div class="gmail_quote">On Feb 8, 2017 06:59, "Samuel Iglesias Gonsálvez" <<a href="mailto:siglesias@igalia.com">siglesias@igalia.com</a>> wrote:<br type="attribution"><blockquote class="gmail_quote" style="margin:0 0 0 .8ex;border-left:1px #ccc solid;padding-left:1ex">Signed-off-by: Samuel Iglesias Gonsálvez <<a href="mailto:siglesias@igalia.com">siglesias@igalia.com</a>><br>
Bugzilla: <a href="https://bugs.freedesktop.org/show_bug.cgi?id=99660" rel="noreferrer" target="_blank">https://bugs.freedesktop.org/<wbr>show_bug.cgi?id=99660</a><br>
---<br>
 src/mesa/drivers/dri/i965/brw_<wbr>fs_nir.cpp | 15 +++++++++++++--<br>
 1 file changed, 13 insertions(+), 2 deletions(-)<br>
<br>
diff --git a/src/mesa/drivers/dri/i965/<wbr>brw_fs_nir.cpp b/src/mesa/drivers/dri/i965/<wbr>brw_fs_nir.cpp<br>
index 76887a9e3eb..991c20fad62 100644<br>
--- a/src/mesa/drivers/dri/i965/<wbr>brw_fs_nir.cpp<br>
+++ b/src/mesa/drivers/dri/i965/<wbr>brw_fs_nir.cpp<br>
@@ -1094,15 +1094,26 @@ fs_visitor::nir_emit_alu(const fs_builder &bld, nir_alu_instr *instr)<br>
    case nir_op_f2b:<br>
       bld.CMP(result, op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ);<br>
       break;<br>
+<br>
+   case nir_op_i642b:<br>
    case nir_op_d2b: {<br>
       /* two-argument instructions can't take 64-bit immediates */<br>
-      fs_reg zero = vgrf(glsl_type::double_type);<br>
+      fs_reg zero;<br>
+      fs_reg tmp;<br>
+<br>
+      if (instr->op == nir_op_d2b) {<br>
+         zero = vgrf(glsl_type::double_type);<br>
+         tmp = vgrf(glsl_type::double_type);<br>
+      } else {<br>
+         zero = vgrf(glsl_type::int64_t_type);<br>
+         tmp = vgrf(glsl_type::int64_t_type);<br>
+      }<br>
+<br>
       bld.MOV(zero, setup_imm_df(bld, 0.0));<br>
       /* A SIMD16 execution needs to be split in two instructions, so use<br>
        * a vgrf instead of the flag register as dst so instruction splitting<br>
        * works<br>
        */<br>
-      fs_reg tmp = vgrf(glsl_type::double_type);<br>
       bld.CMP(tmp, op[0], zero, BRW_CONDITIONAL_NZ);<br>
       bld.MOV(result, subscript(tmp, BRW_REGISTER_TYPE_UD, 0));<br>
       break;<br>
--<br>
2.11.0<br>
<br>
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</blockquote></div></div>