[Nouveau] [PATCH] drm/nouveau/clk: Initial implementation for reclocking NVAA/NVAC

Roy Spliet rspliet at eclipso.eu
Sat Nov 9 10:51:58 PST 2013

Reclocking of NVAA/NVAC is substantially different from NV50+, enough to justify a separate clock implementation. This code is a forward-port of reclocking code that has been sitting in a branch for a while, and has been tested on my NVAC. Traces show no significant reasons why this shouldn't work on NVAA, but testers are always welcome. And since these are IGPs without dedicated RAM to reclock, I'm quite confident this should work on the majority of machines (if not all).

In order to reclock, PFIFO must be paused. The first patch hooks up the corrent pausing method for NV50/NV84. Unfortunately, SUBDEV_CLOCK is initialised before ENFINE_FIFO, leading to a nullptr dereference when trying to reclock using config="NvClkMode=xx". Although "failure" on other cards is not as explicit, they do seem to stir up some registers in the PFIFO space as well. I am therefore led to believe the proper fix is initialising PFIFO earlier. However, although I can simply reorder some bits in device.h, I don't oversee the consequences of doing so. May I ask you to look into this for me Ben?

Apart from that, all works fine! Reclocking through the sysfs interface is as stable as I can hope for... at least on my machine.

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