[Nouveau] Tesla shader ISA question

[Ilia Mirkin]

Hello,

I've recently run into an unknown bit in Tesla shaders, and was hoping
you could shed some light on it. I believe they're related to clamping
of some sort. Here are 2 examples (from diff shaders):

a0000401 cc054780     cvt rpi f32 $r0 f32 $r2 [unknown: 00000000 00010000]
a000060d 8c014780     cvt rni s32 $r3 f32 $r3 [unknown: 00000000 00010000]

[This is intel-style syntax, cvt = convert/move, rni/rpi = rounding
mode stuff, hope that clears up the syntax...]

The destination register tends to go to a texture-related instruction
input, in some cases the layer (which is why I suspect clamping). Both
of these were seen on shaders compiled for GT215+ chips. What effect
does turning it on have exactly? Also, is this bit available on
earlier chips (if so, how early)?

Thanks,

  -ilia