[Nouveau] Implement reclocking for DDR2, DDR3, GDDR3
rspliet at eclipso.eu
Mon Sep 29 10:27:12 PDT 2014
Following a series of patches that implement memory reclocking for NVA3/5/8 with
DDR2, DDR3 and GDDR3 on board. I tested these patches on 6 different graphics
cards, but I expect reclocking now to work on many more.
Testers can pick up these patches and test it by enabling pstate
(nouveau.pstate=1). They should then be able to change clocks by writing to
/sys/class/drm/card0/device/pstate. Correct values can be read from this sysfs
node. Note that this API is likely to change in the future, hence it's hidden
behind this kernel parameter.
- Reclocking on many DDR2, DDR3 and GDDR3 cards, both up and down
- Doing so "invisibly", eg no black screens
What still needs fixing:
- GDDR5. There's non-reclocking related issues with GDDR5 cards in this family.
- Link training is only done for a single partition, because I haven't seen
cards that require training on multiple partitions. If you have one, contact me.
- Stability. Sometimes reclocking (esp. in a tight loop) fails and the machine
hangs. Reboot and you're fine. Just up'ing the clocks before gaming and bringing
them back afterwards should not cause serious issues and once the clocks are
changed it's as stable as it was before.
- DDR3 cards that require training will give a black screen on the first
reclock. When stability improves, we might hide this black screen in the
boot process, but not until we're absolutely certain that this can not lead
to hangs or crashes on boot.
- Some DDR2 cards give corruption in the highest performance level, which dis-
appears when clocking back. I suspect this is caused by insufficient bandwidth
between the memory and the graphics processor, but I don't have an answer as to
why bandwidth is insufficient.
- Automatic frequency scaling. Not before the other issues have been resolved.
Please review, and happy testing!
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