[Nouveau] [PATCH 2/3] nv50/ir: Add emit support for MAD IMM format

[Roy Spliet]

But don't enable generation of it in the opProperties, because we can't
guarantee the SDST==SRC2 constraint until after register assignment. We'll
add a post-RA folding pass to utilise this.

Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
---
 src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
index 23e4bab..b1e7409 100644
--- a/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
+++ b/src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nv50.cpp
@@ -939,6 +939,14 @@ CodeEmitterNV50::emitFMAD(const Instruction *i)
 
    code[0] = 0xe0000000;
 
+   if (i->src(1).getFile() == FILE_IMMEDIATE) {
+      code[1] = 0;
+      emitForm_IMM(i);
+      code[0] |= neg_mul << 15;
+      code[0] |= neg_add << 22;
+      if (i->saturate)
+         code[0] |= 1 << 8;
+   } else
    if (i->encSize == 4) {
       emitForm_MUL(i);
       code[0] |= neg_mul << 15;
-- 
2.1.0