[Nouveau] [PATCH 1/11] ARM: tegra: add function to control the GPU rail clamp

Peter De Schrijver pdeschrijver at nvidia.com
Wed Jan 7 06:08:52 PST 2015


On Wed, Jan 07, 2015 at 02:27:10PM +0100, Thierry Reding wrote:

> > Yeah. I plan to have the information of all the clock client of the
> > partitions and
> > the memory clients be defined statically in c source, e.g. pmc-tegra124.c.
> > All modules can declare which domain they belong to in DT. One domain can
> > be really power gated only when no module is awake. Note the clock clients
> > of
> > one domain might not equal to the clocks of the module. The reset is not
> > either.
> > So I don't get the clock and reset from module. How do you think?
> 
> This whole situation is quite messy. The above sequence basically means
> that drivers can't reset hardware modules because otherwise they might
> race with the power domain code. It also means that we can't powergate

The powerdomain framework won't call any powergating method as long as a
module in the domain is still active. So as long as drivers don't try to
reset the hw without having done a pm_runtime_get(), we shouldn't have such
a race?

> modules on demand because they might be in the same power domain as one
> other module that's still busy.
> 

The powerdomain framework keeps track of which modules are active (by hooking
into runtime pm) and won't try to shutdown a domain unless all modules are
inactive.

> How would we handle a situation where a hardware module hangs and we can
> only get it back via a reset?
> 

Cheers,

Peter.


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