[Nouveau] [PATCH 2/7] clock/nva3: Set PLL refclk

[Emil Velikov]

On 21 August 2014 at 12:45, Roy Spliet <rspliet at eclipso.eu> wrote:
> Signed-off-by: Roy Spliet <rspliet at eclipso.eu>
Hi Roy

Just have a quick scan through a nouveau build with -Wextra and I've
noticed an interesting warning

> ---
>  drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c | 73 +++++++++++++++---------
>  drivers/gpu/drm/nouveau/core/subdev/clock/nva3.h |  2 +-
>  drivers/gpu/drm/nouveau/core/subdev/fb/ramnva3.c |  2 +-
>  3 files changed, 48 insertions(+), 29 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
> index a08011c..b9ab90a 100644
> --- a/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
> +++ b/drivers/gpu/drm/nouveau/core/subdev/clock/nva3.c
> @@ -163,17 +163,12 @@ nva3_clock_read(struct nouveau_clock *clk, enum nv_clk_src src)
>  }
>
>  int
> -nva3_clock_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz,
> +nva3_clk_info(struct nouveau_clock *clock, int clk, u32 khz,
>                 struct nva3_clock_info *info)
>  {
> -       struct nouveau_bios *bios = nouveau_bios(clock);
>         struct nva3_clock_priv *priv = (void *)clock;
> -       struct nvbios_pll limits;
> -       u32 oclk, sclk, sdiv;
> -       int P, N, M, diff;
> -       int ret;
> +       u32 oclk, sclk, sdiv, diff;
>
> -       info->pll = 0;
>         info->clk = 0;
>
>         switch (khz) {
> @@ -188,40 +183,64 @@ nva3_clock_info(struct nouveau_clock *clock, int clk, u32 pll, u32 khz,
>                 return khz;
>         default:
>                 sclk = read_vco(priv, clk);
> -               sdiv = min((sclk * 2) / (khz - 2999), (u32)65);
> -               /* if the clock has a PLL attached, and we can get a within
> -                * [-2, 3) MHz of a divider, we'll disable the PLL and use
> -                * the divider instead.
> -                *
> -                * divider can go as low as 2, limited here because NVIDIA
> +               sdiv = min((sclk * 2) / khz, (u32)65);
> +               oclk = (sclk * 2) / sdiv;
> +               diff = ((khz + 3000) - oclk);
> +
> +               /* When imprecise, play it safe and aim for a clock lower than
> +                * desired rather than higher */
> +               if (diff < 0) {
                             ^
warning: comparison of unsigned expression < 0 is always false [-Wtype-limits]

I'm assuming that the appropriate fix would be to change the variable
diff to be unsigned ?

Cheers,
Emil