[Nouveau] [PATCH 4/5] gr/gf100: wait on bottom half of FE's pipeline

[Ilia Mirkin]

A naive question from someone who knows nothing of icmd or bundles... Would
it be better to wait for both bits to become 0 (I.e. 0x6)?
On Jun 8, 2015 11:54 AM, "Alexandre Courbot" <acourbot at nvidia.com> wrote:

> When emitting the ICMD bundle, wait on the bottom half (bit 3 of the
> GR_STATUS register) instead of upper half (bit 2) to make sure methods
> are effectively emitted.
>
> Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
> ---
>  drm/nouveau/nvkm/engine/gr/gf100.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c
> b/drm/nouveau/nvkm/engine/gr/gf100.c
> index 5606c25e5d02..01efc2c96045 100644
> --- a/drm/nouveau/nvkm/engine/gr/gf100.c
> +++ b/drm/nouveau/nvkm/engine/gr/gf100.c
> @@ -699,7 +699,7 @@ gf100_gr_icmd(struct gf100_gr_priv *priv, const struct
> gf100_gr_pack *p)
>
>                 while (addr < next) {
>                         nv_wr32(priv, 0x400200, addr);
> -                       nv_wait(priv, 0x400700, 0x00000002, 0x00000000);
> +                       nv_wait(priv, 0x400700, 0x00000004, 0x00000000);
>                         addr += init->pitch;
>                 }
>         }
> --
> 2.4.2
>
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