[Nouveau] [PATCH] fifo/gk104: fix engine status register offset

[Vince Hsu]

The offset should be 8 on Kepler and later.

Signed-off-by: Vince Hsu <vinceh at nvidia.com>
---
 drm/nouveau/nvkm/engine/fifo/gk104.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Hi,

According to the header[1] the offset for engine status register is 8.

[1] https://github.com/kfractal/nouveau/blob/hwref/drm/nouveau/include/nvkm/hwref/gk104/fifo.h

Thanks,
Vince

diff --git a/drm/nouveau/nvkm/engine/fifo/gk104.c b/drm/nouveau/nvkm/engine/fifo/gk104.c
index 8d5db6d5a558..4fcd147d43c8 100644
--- a/drm/nouveau/nvkm/engine/fifo/gk104.c
+++ b/drm/nouveau/nvkm/engine/fifo/gk104.c
@@ -196,7 +196,7 @@ gk104_fifo_intr_sched_ctxsw(struct gk104_fifo *fifo)
 
 	spin_lock_irqsave(&fifo->base.lock, flags);
 	for (engn = 0; engn < ARRAY_SIZE(fifo->engine); engn++) {
-		u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x04));
+		u32 stat = nvkm_rd32(device, 0x002640 + (engn * 0x08));
 		u32 busy = (stat & 0x80000000);
 		u32 next = (stat & 0x07ff0000) >> 16;
 		u32 chsw = (stat & 0x00008000);
-- 
2.1.4