[Nouveau] [PATCH v3 5/9] pci: implement pcie speed change on Fermi
Karol Herbst
nouveau at karolherbst.de
Tue Oct 13 17:44:33 PDT 2015
v2: rename functions and simplify code a little
Signed-off-by: Karol Herbst <nouveau at karolherbst.de>
---
drm/nouveau/nvkm/subdev/pci/gf100.c | 59 +++++++++++++++++++++++++++++++++++++
drm/nouveau/nvkm/subdev/pci/gf106.c | 5 ++++
drm/nouveau/nvkm/subdev/pci/gk104.c | 3 ++
drm/nouveau/nvkm/subdev/pci/priv.h | 7 +++++
4 files changed, 74 insertions(+)
diff --git a/drm/nouveau/nvkm/subdev/pci/gf100.c b/drm/nouveau/nvkm/subdev/pci/gf100.c
index 5e57c0b..cfc866e 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf100.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf100.c
@@ -29,6 +29,60 @@ gf100_pci_msi_rearm(struct nvkm_pci *pci)
nvkm_pci_wr08(pci, 0x0704, 0xff);
}
+void
+gf100_pcie_set_version(struct nvkm_pci *pci, u8 ver)
+{
+ struct nvkm_device *device = pci->subdev.device;
+
+ if (ver > 1)
+ ver = 1;
+ else
+ ver = 0;
+
+ nvkm_mask(device, 0x02241c, 0x1, ver);
+}
+
+int
+gf100_pcie_version(struct nvkm_pci *pci)
+{
+ struct nvkm_device *device = pci->subdev.device;
+ return (nvkm_rd32(device, 0x02241c) & 0x1) + 1;
+}
+
+void
+gf100_pcie_set_cap_speed(struct nvkm_pci *pci, bool full_speed)
+{
+ struct nvkm_device *device = pci->subdev.device;
+ nvkm_mask(device, 0x02241c, 0x80, full_speed ? 0x80 : 0x0);
+}
+
+int
+gf100_pcie_cap_speed(struct nvkm_pci *pci)
+{
+ struct nvkm_device *device = pci->subdev.device;
+ u8 punits_pci_cap_speed = nvkm_rd32(device, 0x02241c) & 0x80;
+ if (punits_pci_cap_speed == 0x80)
+ return 1;
+ return 0;
+}
+
+int
+gf100_pcie_init(struct nvkm_pci *pci)
+{
+ gf100_pcie_set_cap_speed(pci,
+ g84_pcie_cur_speed(pci) == NVKM_PCIE_SPEED_5_0);
+ return 0;
+}
+
+int
+gf100_pcie_set_link(struct nvkm_pci *pci, enum nvkm_pcie_speed req_speed,
+ u8 req_width)
+{
+ gf100_pcie_set_cap_speed(pci, req_speed == NVKM_PCIE_SPEED_5_0);
+ g84_pcie_set_link_speed(pci, req_speed);
+ return 0;
+}
+
static const struct nvkm_pci_func
gf100_pci_func = {
.init = g84_pci_init,
@@ -37,9 +91,14 @@ gf100_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = gf100_pci_msi_rearm,
+ .pcie.init = gf100_pcie_init,
+ .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
+ .pcie.set_version = gf100_pcie_set_version,
+ .pcie.version = gf100_pcie_version,
.pcie.version_supported = g94_pcie_version_supported,
};
diff --git a/drm/nouveau/nvkm/subdev/pci/gf106.c b/drm/nouveau/nvkm/subdev/pci/gf106.c
index 994cdfd..440d81b 100644
--- a/drm/nouveau/nvkm/subdev/pci/gf106.c
+++ b/drm/nouveau/nvkm/subdev/pci/gf106.c
@@ -30,9 +30,14 @@ gf106_pci_func = {
.wr32 = nv40_pci_wr32,
.msi_rearm = nv40_pci_msi_rearm,
+ .pcie.init = gf100_pcie_init,
+ .pcie.set_link = gf100_pcie_set_link,
+
.pcie.max_speed = g84_pcie_max_speed,
.pcie.cur_speed = g84_pcie_cur_speed,
+ .pcie.set_version = gf100_pcie_set_version,
+ .pcie.version = gf100_pcie_version,
.pcie.version_supported = g94_pcie_version_supported,
};
diff --git a/drm/nouveau/nvkm/subdev/pci/gk104.c b/drm/nouveau/nvkm/subdev/pci/gk104.c
index af79d9b..458dd31 100644
--- a/drm/nouveau/nvkm/subdev/pci/gk104.c
+++ b/drm/nouveau/nvkm/subdev/pci/gk104.c
@@ -31,6 +31,9 @@ gk104_pci_func = {
.msi_rearm = nv40_pci_msi_rearm,
.pcie.cur_speed = g84_pcie_cur_speed,
+
+ .pcie.set_version = gf100_pcie_set_version,
+ .pcie.version = gf100_pcie_version,
};
int
diff --git a/drm/nouveau/nvkm/subdev/pci/priv.h b/drm/nouveau/nvkm/subdev/pci/priv.h
index ea496aa..cac279a 100644
--- a/drm/nouveau/nvkm/subdev/pci/priv.h
+++ b/drm/nouveau/nvkm/subdev/pci/priv.h
@@ -46,5 +46,12 @@ int g84_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
int g94_pcie_version_supported(struct nvkm_pci *);
+void gf100_pcie_set_version(struct nvkm_pci *, u8);
+int gf100_pcie_version(struct nvkm_pci *);
+void gf100_pcie_set_cap_speed(struct nvkm_pci *, bool);
+int gf100_pcie_cap_speed(struct nvkm_pci *);
+int gf100_pcie_init(struct nvkm_pci *);
+int gf100_pcie_set_link(struct nvkm_pci *, enum nvkm_pcie_speed, u8);
+
int nvkm_pcie_init(struct nvkm_pci *pci);
#endif
--
2.6.1
More information about the Nouveau
mailing list