[Nouveau] [PATCH v5 03/20] bios/volt: Handle voltage table version 0x50 with 0ed header

Karol Herbst karolherbst at gmail.com
Tue Aug 16 20:46:46 UTC 2016


Some Fermi+ GPUs specify VID information via voltage table entries, rather
than describing them as a range in the header.

The mask may be bigger than 0x1fffff, but this value is already >2V, so it
will be fine for now.

This patch fixes volting issues on those cards enabling them to switch
cstates.

Signed-off-by: Karol Herbst <karolherbst at gmail.com>
Reviewed-by: Martin Peres <martin.peres at free.fr>
Tested-by: Pierre Moreau <pierre.morrow at free.fr>
---
 drm/nouveau/nvkm/subdev/bios/volt.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/drm/nouveau/nvkm/subdev/bios/volt.c b/drm/nouveau/nvkm/subdev/bios/volt.c
index 6e0a336..81a47b2 100644
--- a/drm/nouveau/nvkm/subdev/bios/volt.c
+++ b/drm/nouveau/nvkm/subdev/bios/volt.c
@@ -142,7 +142,10 @@ nvbios_volt_entry_parse(struct nvkm_bios *bios, int idx, u8 *ver, u8 *len,
 		info->vid     = nvbios_rd08(bios, volt + 0x01) >> 2;
 		break;
 	case 0x40:
+		break;
 	case 0x50:
+		info->voltage = nvbios_rd32(bios, volt) & 0x001fffff;
+		info->vid     = (nvbios_rd32(bios, volt) >> 23) & 0xff;
 		break;
 	}
 	return volt;
-- 
2.9.2



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