[Nouveau] [PATCH 4/8] secboot: use falcon library definitions

Alexandre Courbot acourbot at nvidia.com
Tue Dec 6 05:35:41 UTC 2016


Use the definitions provided by the falcon library instead of
re-defining our own.

Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
---
 drm/nouveau/include/nvkm/subdev/secboot.h | 12 +-----
 drm/nouveau/nvkm/engine/gr/gf100.c        | 16 ++++----
 drm/nouveau/nvkm/engine/gr/gm200.c        |  6 +--
 drm/nouveau/nvkm/subdev/secboot/base.c    | 18 ++++-----
 drm/nouveau/nvkm/subdev/secboot/gm200.c   | 49 +++++++++---------------
 drm/nouveau/nvkm/subdev/secboot/gm20b.c   |  4 +-
 drm/nouveau/nvkm/subdev/secboot/priv.h    |  9 ++--
 7 files changed, 47 insertions(+), 67 deletions(-)

diff --git a/drm/nouveau/include/nvkm/subdev/secboot.h b/drm/nouveau/include/nvkm/subdev/secboot.h
index b04c38c07761..fe0b849ac94e 100644
--- a/drm/nouveau/include/nvkm/subdev/secboot.h
+++ b/drm/nouveau/include/nvkm/subdev/secboot.h
@@ -24,15 +24,7 @@
 #define __NVKM_SECURE_BOOT_H__
 
 #include <core/subdev.h>
-
-enum nvkm_secboot_falcon {
-	NVKM_SECBOOT_FALCON_PMU	= 0,
-	NVKM_SECBOOT_FALCON_RESERVED = 1,
-	NVKM_SECBOOT_FALCON_FECS = 2,
-	NVKM_SECBOOT_FALCON_GPCCS = 3,
-	NVKM_SECBOOT_FALCON_END = 4,
-	NVKM_SECBOOT_FALCON_INVALID = 0xffffffff,
-};
+#include <engine/falcon.h>
 
 /**
  * @base:		base IO address of the falcon performing secure boot
@@ -48,7 +40,7 @@ struct nvkm_secboot {
 };
 #define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)
 
-bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon);
+bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_falconidx);
 int nvkm_secboot_reset(struct nvkm_secboot *, u32 falcon);
 int nvkm_secboot_start(struct nvkm_secboot *, u32 falcon);
 
diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/engine/gr/gf100.c
index 60a1b5c8214b..b8095ca89352 100644
--- a/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -1464,16 +1464,16 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
 		nvkm_mc_unk260(device, 0);
 
 		/* securely-managed falcons must be reset using secure boot */
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
-			ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_FECS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_FECS))
+			ret = nvkm_secboot_reset(sb, NVKM_FALCON_FECS);
 		else
 			gf100_gr_init_fw(gr, 0x409000, &gr->fuc409c,
 					 &gr->fuc409d);
 		if (ret)
 			return ret;
 
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
-			ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_GPCCS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_GPCCS))
+			ret = nvkm_secboot_reset(sb, NVKM_FALCON_GPCCS);
 		else
 			gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac,
 					 &gr->fuc41ad);
@@ -1487,12 +1487,12 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
 		nvkm_wr32(device, 0x41a10c, 0x00000000);
 		nvkm_wr32(device, 0x40910c, 0x00000000);
 
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
-			nvkm_secboot_start(sb, NVKM_SECBOOT_FALCON_GPCCS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_GPCCS))
+			nvkm_secboot_start(sb, NVKM_FALCON_GPCCS);
 		else
 			nvkm_wr32(device, 0x41a100, 0x00000002);
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
-			nvkm_secboot_start(sb, NVKM_SECBOOT_FALCON_FECS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_FECS))
+			nvkm_secboot_start(sb, NVKM_FALCON_FECS);
 		else
 			nvkm_wr32(device, 0x409100, 0x00000002);
 		if (nvkm_msec(device, 2000,
diff --git a/drm/nouveau/nvkm/engine/gr/gm200.c b/drm/nouveau/nvkm/engine/gr/gm200.c
index 6435f1257572..7f4de8e3c643 100644
--- a/drm/nouveau/nvkm/engine/gr/gm200.c
+++ b/drm/nouveau/nvkm/engine/gr/gm200.c
@@ -184,14 +184,12 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
 		return ret;
 
 	/* Load firmwares for non-secure falcons */
-	if (!nvkm_secboot_is_managed(device->secboot,
-				     NVKM_SECBOOT_FALCON_FECS)) {
+	if (!nvkm_secboot_is_managed(device->secboot, NVKM_FALCON_FECS)) {
 		if ((ret = gf100_gr_ctor_fw(gr, "gr/fecs_inst", &gr->fuc409c)) ||
 		    (ret = gf100_gr_ctor_fw(gr, "gr/fecs_data", &gr->fuc409d)))
 			return ret;
 	}
-	if (!nvkm_secboot_is_managed(device->secboot,
-				     NVKM_SECBOOT_FALCON_GPCCS)) {
+	if (!nvkm_secboot_is_managed(device->secboot, NVKM_FALCON_GPCCS)) {
 		if ((ret = gf100_gr_ctor_fw(gr, "gr/gpccs_inst", &gr->fuc41ac)) ||
 		    (ret = gf100_gr_ctor_fw(gr, "gr/gpccs_data", &gr->fuc41ad)))
 			return ret;
diff --git a/drm/nouveau/nvkm/subdev/secboot/base.c b/drm/nouveau/nvkm/subdev/secboot/base.c
index 314be2192b7d..ad3767236475 100644
--- a/drm/nouveau/nvkm/subdev/secboot/base.c
+++ b/drm/nouveau/nvkm/subdev/secboot/base.c
@@ -26,11 +26,11 @@
 
 static const char *
 managed_falcons_names[] = {
-	[NVKM_SECBOOT_FALCON_PMU] = "PMU",
-	[NVKM_SECBOOT_FALCON_RESERVED] = "<reserved>",
-	[NVKM_SECBOOT_FALCON_FECS] = "FECS",
-	[NVKM_SECBOOT_FALCON_GPCCS] = "GPCCS",
-	[NVKM_SECBOOT_FALCON_END] = "<invalid>",
+	[NVKM_FALCON_PMU] = "PMU",
+	[NVKM_FALCON_RESERVED] = "<reserved>",
+	[NVKM_FALCON_FECS] = "FECS",
+	[NVKM_FALCON_GPCCS] = "GPCCS",
+	[NVKM_FALCON_END] = "<invalid>",
 };
 
 /*
@@ -190,8 +190,7 @@ nvkm_secboot_start(struct nvkm_secboot *sb, u32 falcon)
  * nvkm_secboot_is_managed() - check whether a given falcon is securely-managed
  */
 bool
-nvkm_secboot_is_managed(struct nvkm_secboot *secboot,
-			enum nvkm_secboot_falcon fid)
+nvkm_secboot_is_managed(struct nvkm_secboot *secboot, enum nvkm_falconidx fid)
 {
 	if (!secboot)
 		return false;
@@ -260,7 +259,7 @@ nvkm_secboot_ctor(const struct nvkm_secboot_func *func,
 
 	/* setup the performing falcon's base address and masks */
 	switch (func->boot_falcon) {
-	case NVKM_SECBOOT_FALCON_PMU:
+	case NVKM_FALCON_PMU:
 		sb->devidx = NVKM_SUBDEV_PMU;
 		sb->base = 0x10a000;
 		break;
@@ -270,8 +269,7 @@ nvkm_secboot_ctor(const struct nvkm_secboot_func *func,
 	};
 
 	nvkm_debug(&sb->subdev, "securely managed falcons:\n");
-	for_each_set_bit(fid, &sb->func->managed_falcons,
-			 NVKM_SECBOOT_FALCON_END)
+	for_each_set_bit(fid, &sb->func->managed_falcons, NVKM_FALCON_END)
 		nvkm_debug(&sb->subdev, "- %s\n", managed_falcons_names[fid]);
 
 	return 0;
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index ec48e4ace37a..718cfa129a82 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -87,14 +87,6 @@
 #include <core/firmware.h>
 #include <subdev/fb.h>
 
-enum {
-	FALCON_DMAIDX_UCODE		= 0,
-	FALCON_DMAIDX_VIRT		= 1,
-	FALCON_DMAIDX_PHYS_VID		= 2,
-	FALCON_DMAIDX_PHYS_SYS_COH	= 3,
-	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,
-};
-
 /**
  * struct fw_bin_header - header of firmware files
  * @bin_magic:		always 0x3b1d14f0
@@ -296,7 +288,7 @@ struct ls_ucode_img_desc {
  */
 struct ls_ucode_img {
 	struct list_head node;
-	enum nvkm_secboot_falcon falcon_id;
+	enum nvkm_falconidx falcon_id;
 
 	struct ls_ucode_img_desc ucode_desc;
 	u32 *ucode_header;
@@ -530,15 +522,14 @@ typedef int (*lsf_load_func)(struct nvkm_subdev *, struct ls_ucode_img *);
 static int
 ls_ucode_img_load_fecs(struct nvkm_subdev *subdev, struct ls_ucode_img *img)
 {
-	return ls_ucode_img_load_generic(subdev, img, "fecs",
-					 NVKM_SECBOOT_FALCON_FECS);
+	return ls_ucode_img_load_generic(subdev, img, "fecs", NVKM_FALCON_FECS);
 }
 
 static int
 ls_ucode_img_load_gpccs(struct nvkm_subdev *subdev, struct ls_ucode_img *img)
 {
 	return ls_ucode_img_load_generic(subdev, img, "gpccs",
-					 NVKM_SECBOOT_FALCON_GPCCS);
+					 NVKM_FALCON_GPCCS);
 }
 
 /**
@@ -564,9 +555,9 @@ ls_ucode_img_load(struct nvkm_subdev *subdev, lsf_load_func load_func)
 }
 
 static const lsf_load_func lsf_load_funcs[] = {
-	[NVKM_SECBOOT_FALCON_END] = NULL, /* reserve enough space */
-	[NVKM_SECBOOT_FALCON_FECS] = ls_ucode_img_load_fecs,
-	[NVKM_SECBOOT_FALCON_GPCCS] = ls_ucode_img_load_gpccs,
+	[NVKM_FALCON_END] = NULL, /* reserve enough space */
+	[NVKM_FALCON_FECS] = ls_ucode_img_load_fecs,
+	[NVKM_FALCON_GPCCS] = ls_ucode_img_load_gpccs,
 };
 
 /**
@@ -685,7 +676,7 @@ ls_ucode_img_fill_headers(struct gm200_secboot *gsb, struct ls_ucode_img *img,
 		lhdr->flags = LSF_FLAG_DMACTL_REQ_CTX;
 
 	/* GPCCS will be loaded using PRI */
-	if (img->falcon_id == NVKM_SECBOOT_FALCON_GPCCS)
+	if (img->falcon_id == NVKM_FALCON_GPCCS)
 		lhdr->flags |= LSF_FLAG_FORCE_PRIV_LOAD;
 
 	/* Align (size bloat) and save off BL descriptor size */
@@ -794,7 +785,7 @@ ls_ucode_mgr_write_wpr(struct gm200_secboot *gsb, struct ls_ucode_mgr *mgr,
 		pos += sizeof(img->wpr_header);
 	}
 
-	nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID);
+	nvkm_wo32(wpr_blob, pos, NVKM_FALCON_INVALID);
 
 	nvkm_done(wpr_blob);
 
@@ -824,7 +815,7 @@ gm200_secboot_prepare_ls_blob(struct gm200_secboot *gsb)
 
 	/* Load all LS blobs */
 	for_each_set_bit(falcon_id, &gsb->base.func->managed_falcons,
-			 NVKM_SECBOOT_FALCON_END) {
+			 NVKM_FALCON_END) {
 		struct ls_ucode_img *img;
 
 		img = ls_ucode_img_load(&sb->subdev, lsf_load_funcs[falcon_id]);
@@ -1258,7 +1249,7 @@ done:
  * falcons should have their LS firmware loaded and be ready to run.
  */
 int
-gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
+gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_falconidx falcon)
 {
 	struct gm200_secboot *gsb = gm200_secboot(sb);
 	int ret;
@@ -1276,12 +1267,12 @@ gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
 	 * Once we have proper PMU firmware and support, this will be changed
 	 * to a proper call to the PMU method.
 	 */
-	if (falcon != NVKM_SECBOOT_FALCON_FECS)
+	if (falcon != NVKM_FALCON_FECS)
 		goto end;
 
 	/* If WPR is set and we have an unload blob, run it to unlock WPR */
 	if (gsb->acr_unload_blob &&
-	    gsb->falcon_state[NVKM_SECBOOT_FALCON_FECS] != NON_SECURE) {
+	    gsb->falcon_state[NVKM_FALCON_FECS] != NON_SECURE) {
 		ret = gm200_secboot_run_hs_blob(gsb, gsb->acr_unload_blob,
 						&gsb->acr_unload_bl_desc);
 		if (ret)
@@ -1300,16 +1291,16 @@ end:
 }
 
 int
-gm200_secboot_start(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
+gm200_secboot_start(struct nvkm_secboot *sb, enum nvkm_falconidx falcon)
 {
 	struct gm200_secboot *gsb = gm200_secboot(sb);
 	int base;
 
 	switch (falcon) {
-	case NVKM_SECBOOT_FALCON_FECS:
+	case NVKM_FALCON_FECS:
 		base = 0x409000;
 		break;
-	case NVKM_SECBOOT_FALCON_GPCCS:
+	case NVKM_FALCON_GPCCS:
 		base = 0x41a000;
 		break;
 	default:
@@ -1373,11 +1364,11 @@ gm200_secboot_fini(struct nvkm_secboot *sb, bool suspend)
 
 	/* Run the unload blob to unprotect the WPR region */
 	if (gsb->acr_unload_blob &&
-	    gsb->falcon_state[NVKM_SECBOOT_FALCON_FECS] != NON_SECURE)
+	    gsb->falcon_state[NVKM_FALCON_FECS] != NON_SECURE)
 		ret = gm200_secboot_run_hs_blob(gsb, gsb->acr_unload_blob,
 						&gsb->acr_unload_bl_desc);
 
-	for (i = 0; i < NVKM_SECBOOT_FALCON_END; i++)
+	for (i = 0; i < NVKM_FALCON_END; i++)
 		gsb->falcon_state[i] = NON_SECURE;
 
 	return ret;
@@ -1409,9 +1400,9 @@ gm200_secboot = {
 	.fini = gm200_secboot_fini,
 	.reset = gm200_secboot_reset,
 	.start = gm200_secboot_start,
-	.managed_falcons = BIT(NVKM_SECBOOT_FALCON_FECS) |
-			   BIT(NVKM_SECBOOT_FALCON_GPCCS),
-	.boot_falcon = NVKM_SECBOOT_FALCON_PMU,
+	.managed_falcons = BIT(NVKM_FALCON_FECS) |
+			   BIT(NVKM_FALCON_GPCCS),
+	.boot_falcon = NVKM_FALCON_PMU,
 };
 
 /**
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index d5395ebfe8d3..66a1d01f45ce 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -192,8 +192,8 @@ gm20b_secboot = {
 	.init = gm20b_secboot_init,
 	.reset = gm200_secboot_reset,
 	.start = gm200_secboot_start,
-	.managed_falcons = BIT(NVKM_SECBOOT_FALCON_FECS),
-	.boot_falcon = NVKM_SECBOOT_FALCON_PMU,
+	.managed_falcons = BIT(NVKM_FALCON_FECS),
+	.boot_falcon = NVKM_FALCON_PMU,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/secboot/priv.h b/drm/nouveau/nvkm/subdev/secboot/priv.h
index a9a8a0e1017e..f77b69219b44 100644
--- a/drm/nouveau/nvkm/subdev/secboot/priv.h
+++ b/drm/nouveau/nvkm/subdev/secboot/priv.h
@@ -25,16 +25,17 @@
 
 #include <subdev/secboot.h>
 #include <subdev/mmu.h>
+#include <engine/falcon.h>
 
 struct nvkm_secboot_func {
 	int (*init)(struct nvkm_secboot *);
 	int (*fini)(struct nvkm_secboot *, bool suspend);
 	void *(*dtor)(struct nvkm_secboot *);
-	int (*reset)(struct nvkm_secboot *, enum nvkm_secboot_falcon);
-	int (*start)(struct nvkm_secboot *, enum nvkm_secboot_falcon);
+	int (*reset)(struct nvkm_secboot *, enum nvkm_falconidx);
+	int (*start)(struct nvkm_secboot *, enum nvkm_falconidx);
 
 	/* ID of the falcon that will perform secure boot */
-	enum nvkm_secboot_falcon boot_falcon;
+	enum nvkm_falconidx boot_falcon;
 	/* Bit-mask of IDs of managed falcons */
 	unsigned long managed_falcons;
 };
@@ -191,7 +192,7 @@ struct gm200_secboot {
 		RESET,
 		/* In low-secure mode and running */
 		RUNNING,
-	} falcon_state[NVKM_SECBOOT_FALCON_END];
+	} falcon_state[NVKM_FALCON_END];
 
 	bool firmware_ok;
 };
-- 
git-series 0.8.10


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