[Nouveau] [PATCH v5 14/18] secboot: set default error value in error register

[Alexandre Courbot]

Set a default error value in the mailbox 0 register so we can catch
cases where the secure boot binary fails early without being able to
report anything.

Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
---
 drm/nouveau/nvkm/subdev/secboot/gm200.c | 3 +++
 1 file changed, 3 insertions(+), 0 deletions(-)

diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index 2fcb2f761a54..813c4eb0b25f 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -67,6 +67,9 @@ gm200_secboot_run_blob(struct nvkm_secboot *sb, struct nvkm_gpuobj *blob)
 	/* Disable interrupts as we will poll for the HALT bit */
 	nvkm_mc_intr_mask(sb->subdev.device, falcon->owner->index, false);
 
+	/* Set default error value in mailbox register */
+	nvkm_falcon_wr32(falcon, 0x040, 0xdeada5a5);
+
 	/* Start the HS bootloader */
 	nvkm_falcon_set_start_addr(falcon, sb->acr->start_address);
 	nvkm_falcon_start(falcon);
-- 
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