[Nouveau] [PATCH v4 0/33] Secure Boot refactoring / signed PMU firmware support for GM20B

Alexandre Courbot acourbot at nvidia.com
Mon Nov 21 08:28:57 UTC 2016

This revision includes initial signed PMU firmware support for GM20B
(Tegra X1). This PMU code will also be used as a basis for dGPU signed
PMU firmware support.

With the PMU code, the refactoring of secure boot should also make
more sense.

ACR (secure boot) support is now separated by the driver version it
originates from. This separation allows to run any version of the ACR
on any chip, although in practice only one version should ever be
released for any given chip. But since ACR only changes slightly from
version to version, we just have to program the difference against
the previous version in order to support a new one.

The same applies to the PMU firmware, although with a different
versioning scheme. The firmware version number is encoded in a field
of the descriptor file. This version is arbitrary, but can be matched
to a given set of message formats. Again, much code can be reused between

The PMU code for GM20B is available from branch 'gm20b' of
https://github.com/Gnurou/linux-firmware, which will be pushed to
upstream unless issues about the PMU files naming scheme are raised.

Note that the present code will still work if the PMU firmware is not
present, meaning compatibility with non-updated user space is maintained.

Changes since v1:
- Use NVIDIA driver versions to differenciate the ACR structures instead of
  arbitrary numbers
- Add abstractions to firmware loading functions
- Optimized set of abstractions
- Removed some more code

Changes since v2:
- Fix naming of new structures/functions

Changes since v3:
- Add PMU support code for GM20B.

Alexandre Courbot (31):
  core: constify nv*_printk macros
  core: add falcon library
  secboot: use falcon library's IMEM/DMEM loading functions
  secboot: rename init() hook to oneinit()
  secboot: remove fixup_hs_desc hook
  secboot: add low-secure firmware hooks
  secboot: generate HS BL descriptor in hook
  secboot: reorganize into more files
  secboot: add LS flags to LS func structure
  secboot: split reset function
  secboot: disable falcon interrupts before running
  secboot: remove unneeded ls_ucode_img member
  secboot: remove ls_ucode_mgr
  secboot: abstract LS firmware loading functions
  secboot: safer zeroing of BL descriptors
  secboot: add missing fields to BL structure
  secboot: set default error value in error register
  secboot: fix WPR descriptor generation
  secboot: add lazy-bootstrap flag
  secboot: store falcon's DMEM size in secboot structure
  secboot: clear halt interrupt after ACR is run
  core: add falcon DMEM read function
  pmu: add nvkm_pmu_ctor function
  pmu: make sure the reset hook exists before running it
  secboot: add LS firmware post-run hooks
  secboot: support for loading LS PMU firmware
  secboot: base support for PMU falcon
  secboot: write PMU firmware version into register
  secboot: enable PMU in r352 ACR
  secboot: support optional falcons
  gm20b: enable PMU

Deepak Goyal (2):
  pmu: support for GM20X
  pmu: support for GM20B signed firmware

 drm/nouveau/include/nvkm/core/client.h         |    4 +-
 drm/nouveau/include/nvkm/core/device.h         |    2 +-
 drm/nouveau/include/nvkm/core/falcon.h         |   51 +-
 drm/nouveau/include/nvkm/core/subdev.h         |    2 +-
 drm/nouveau/include/nvkm/subdev/pmu.h          |   12 +-
 drm/nouveau/include/nvkm/subdev/secboot.h      |   30 +-
 drm/nouveau/nvkm/core/Kbuild                   |    1 +-
 drm/nouveau/nvkm/core/falcon.c                 |   72 +-
 drm/nouveau/nvkm/engine/device/base.c          |    1 +-
 drm/nouveau/nvkm/engine/gr/gf100.c             |   16 +-
 drm/nouveau/nvkm/engine/gr/gm200.c             |    6 +-
 drm/nouveau/nvkm/subdev/pmu/Kbuild             |    3 +-
 drm/nouveau/nvkm/subdev/pmu/base.c             |   68 +-
 drm/nouveau/nvkm/subdev/pmu/gm200.c            |  713 +++++++++-
 drm/nouveau/nvkm/subdev/pmu/gm200.h            |  104 +-
 drm/nouveau/nvkm/subdev/pmu/nv_0137c63d.c      |  255 +++-
 drm/nouveau/nvkm/subdev/pmu/nv_pmu.h           |   53 +-
 drm/nouveau/nvkm/subdev/pmu/priv.h             |   22 +-
 drm/nouveau/nvkm/subdev/secboot/Kbuild         |    5 +-
 drm/nouveau/nvkm/subdev/secboot/acr.c          |   54 +-
 drm/nouveau/nvkm/subdev/secboot/acr.h          |   73 +-
 drm/nouveau/nvkm/subdev/secboot/acr_r352.c     | 1111 ++++++++++++++-
 drm/nouveau/nvkm/subdev/secboot/acr_r352.h     |  252 +++-
 drm/nouveau/nvkm/subdev/secboot/acr_r361.c     |  135 ++-
 drm/nouveau/nvkm/subdev/secboot/base.c         |  151 +-
 drm/nouveau/nvkm/subdev/secboot/gm200.c        | 1337 +-----------------
 drm/nouveau/nvkm/subdev/secboot/gm200.h        |   43 +-
 drm/nouveau/nvkm/subdev/secboot/gm20b.c        |  128 +--
 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h     |  153 ++-
 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c  |  158 ++-
 drm/nouveau/nvkm/subdev/secboot/ls_ucode_pmu.c |   89 +-
 drm/nouveau/nvkm/subdev/secboot/priv.h         |  199 +---
 32 files changed, 3636 insertions(+), 1667 deletions(-)
 create mode 100644 drm/nouveau/include/nvkm/core/falcon.h
 create mode 100644 drm/nouveau/nvkm/core/falcon.c
 create mode 100644 drm/nouveau/nvkm/subdev/pmu/gm200.c
 create mode 100644 drm/nouveau/nvkm/subdev/pmu/gm200.h
 create mode 100644 drm/nouveau/nvkm/subdev/pmu/nv_0137c63d.c
 create mode 100644 drm/nouveau/nvkm/subdev/pmu/nv_pmu.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r352.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r352.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/acr_r361.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/gm200.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/ls_ucode.h
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/ls_ucode_gr.c
 create mode 100644 drm/nouveau/nvkm/subdev/secboot/ls_ucode_pmu.c

git-series 0.8.10

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