[Nouveau] [PATCH v2 02/14] core: add falcon library

Alexandre Courbot acourbot at nvidia.com
Thu Oct 27 04:36:56 UTC 2016


Some falcon functionality, like loading code/data into IMEM/DMEM, is
re-implemented in various parts of the driver. Create a small falcon
library that will contain most common operations in order to avoid
duplicate code.

For now this library contains various defines that are used in secure
boot code, plus IMEM and DMEM loading functions.

In addition to the library itself, this patch updates users of the
previously secure-boot only definitions to use the new global ones.

Signed-off-by: Alexandre Courbot <acourbot at nvidia.com>
---
 drm/nouveau/include/nvkm/core/falcon.h    | 50 +++++++++++++++++++++++++
 drm/nouveau/include/nvkm/subdev/secboot.h | 16 ++------
 drm/nouveau/nvkm/core/Kbuild              |  1 +
 drm/nouveau/nvkm/core/falcon.c            | 62 +++++++++++++++++++++++++++++++
 drm/nouveau/nvkm/engine/gr/gf100.c        | 16 ++++----
 drm/nouveau/nvkm/engine/gr/gm200.c        |  6 +--
 drm/nouveau/nvkm/subdev/secboot/base.c    | 23 +++---------
 drm/nouveau/nvkm/subdev/secboot/gm200.c   | 48 ++++++++++--------------
 drm/nouveau/nvkm/subdev/secboot/gm20b.c   |  4 +-
 drm/nouveau/nvkm/subdev/secboot/priv.h    |  8 ++--
 10 files changed, 159 insertions(+), 75 deletions(-)
 create mode 100644 drm/nouveau/include/nvkm/core/falcon.h
 create mode 100644 drm/nouveau/nvkm/core/falcon.c

diff --git a/drm/nouveau/include/nvkm/core/falcon.h b/drm/nouveau/include/nvkm/core/falcon.h
new file mode 100644
index 000000000000..530119847163
--- /dev/null
+++ b/drm/nouveau/include/nvkm/core/falcon.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (c) 2014, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NVKM_FALCON_H__
+#define __NVKM_FALCON_H__
+
+#include <core/device.h>
+
+enum nvkm_falconidx {
+	NVKM_FALCON_PMU		= 0,
+	NVKM_FALCON_RESERVED	= 1,
+	NVKM_FALCON_FECS	= 2,
+	NVKM_FALCON_GPCCS	= 3,
+	NVKM_FALCON_END		= 4,
+	NVKM_FALCON_INVALID	= 0xffffffff,
+};
+
+enum nvkm_falcon_dmaidx {
+	FALCON_DMAIDX_UCODE		= 0,
+	FALCON_DMAIDX_VIRT		= 1,
+	FALCON_DMAIDX_PHYS_VID		= 2,
+	FALCON_DMAIDX_PHYS_SYS_COH	= 3,
+	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,
+};
+
+extern const char *nvkm_falcon_name[];
+
+void nvkm_falcon_load_imem(struct nvkm_device *, u32, void *, u32, u32, u32);
+void nvkm_falcon_load_dmem(struct nvkm_device *, u32, void *, u32, u32);
+
+#endif
diff --git a/drm/nouveau/include/nvkm/subdev/secboot.h b/drm/nouveau/include/nvkm/subdev/secboot.h
index b04c38c07761..ffc2204d2a50 100644
--- a/drm/nouveau/include/nvkm/subdev/secboot.h
+++ b/drm/nouveau/include/nvkm/subdev/secboot.h
@@ -24,15 +24,7 @@
 #define __NVKM_SECURE_BOOT_H__
 
 #include <core/subdev.h>
-
-enum nvkm_secboot_falcon {
-	NVKM_SECBOOT_FALCON_PMU	= 0,
-	NVKM_SECBOOT_FALCON_RESERVED = 1,
-	NVKM_SECBOOT_FALCON_FECS = 2,
-	NVKM_SECBOOT_FALCON_GPCCS = 3,
-	NVKM_SECBOOT_FALCON_END = 4,
-	NVKM_SECBOOT_FALCON_INVALID = 0xffffffff,
-};
+#include <core/falcon.h>
 
 /**
  * @base:		base IO address of the falcon performing secure boot
@@ -48,9 +40,9 @@ struct nvkm_secboot {
 };
 #define nvkm_secboot(p) container_of((p), struct nvkm_secboot, subdev)
 
-bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_secboot_falcon);
-int nvkm_secboot_reset(struct nvkm_secboot *, u32 falcon);
-int nvkm_secboot_start(struct nvkm_secboot *, u32 falcon);
+bool nvkm_secboot_is_managed(struct nvkm_secboot *, enum nvkm_falconidx);
+int nvkm_secboot_reset(struct nvkm_secboot *, enum nvkm_falconidx);
+int nvkm_secboot_start(struct nvkm_secboot *, enum nvkm_falconidx);
 
 int gm200_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
 int gm20b_secboot_new(struct nvkm_device *, int, struct nvkm_secboot **);
diff --git a/drm/nouveau/nvkm/core/Kbuild b/drm/nouveau/nvkm/core/Kbuild
index 86a31a8e1e51..4196e4620c3b 100644
--- a/drm/nouveau/nvkm/core/Kbuild
+++ b/drm/nouveau/nvkm/core/Kbuild
@@ -13,3 +13,4 @@ nvkm-y += nvkm/core/oproxy.o
 nvkm-y += nvkm/core/option.o
 nvkm-y += nvkm/core/ramht.o
 nvkm-y += nvkm/core/subdev.o
+nvkm-y += nvkm/core/falcon.o
diff --git a/drm/nouveau/nvkm/core/falcon.c b/drm/nouveau/nvkm/core/falcon.c
new file mode 100644
index 000000000000..806de4088a29
--- /dev/null
+++ b/drm/nouveau/nvkm/core/falcon.c
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include <core/falcon.h>
+
+const char *
+nvkm_falcon_name[] = {
+	[NVKM_FALCON_PMU] = "PMU",
+	[NVKM_FALCON_RESERVED] = "<reserved>",
+	[NVKM_FALCON_FECS] = "FECS",
+	[NVKM_FALCON_GPCCS] = "GPCCS",
+	[NVKM_FALCON_END] = "<invalid>",
+};
+
+void
+nvkm_falcon_load_imem(struct nvkm_device *device, u32 base, void *data,
+		      u32 start, u32 size, u32 tag)
+{
+	int i;
+
+	nvkm_wr32(device, base + 0x180, start | (0x1 << 24));
+	for (i = 0; i < size / 4; i++) {
+		/* write new tag every 256B */
+		if ((i & 0x3f) == 0) {
+			nvkm_wr32(device, base + 0x188, tag & 0xffff);
+			tag++;
+		}
+		nvkm_wr32(device, base + 0x184, ((u32 *)data)[i]);
+	}
+	nvkm_wr32(device, base + 0x188, 0);
+}
+
+void
+nvkm_falcon_load_dmem(struct nvkm_device *device, u32 base, void *data,
+		      u32 start, u32 size)
+{
+	int i;
+
+	nvkm_wr32(device, base + 0x1c0, start | (0x1 << 24));
+	for (i = 0; i < size / 4; i++)
+		nvkm_wr32(device, base + 0x1c4, ((u32 *)data)[i]);
+}
+
diff --git a/drm/nouveau/nvkm/engine/gr/gf100.c b/drm/nouveau/nvkm/engine/gr/gf100.c
index 157919c788e6..f0dafe666a5a 100644
--- a/drm/nouveau/nvkm/engine/gr/gf100.c
+++ b/drm/nouveau/nvkm/engine/gr/gf100.c
@@ -1464,16 +1464,16 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
 		nvkm_mc_unk260(device, 0);
 
 		/* securely-managed falcons must be reset using secure boot */
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
-			ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_FECS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_FECS))
+			ret = nvkm_secboot_reset(sb, NVKM_FALCON_FECS);
 		else
 			gf100_gr_init_fw(gr, 0x409000, &gr->fuc409c,
 					 &gr->fuc409d);
 		if (ret)
 			return ret;
 
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
-			ret = nvkm_secboot_reset(sb, NVKM_SECBOOT_FALCON_GPCCS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_GPCCS))
+			ret = nvkm_secboot_reset(sb, NVKM_FALCON_GPCCS);
 		else
 			gf100_gr_init_fw(gr, 0x41a000, &gr->fuc41ac,
 					 &gr->fuc41ad);
@@ -1487,12 +1487,12 @@ gf100_gr_init_ctxctl(struct gf100_gr *gr)
 		nvkm_wr32(device, 0x41a10c, 0x00000000);
 		nvkm_wr32(device, 0x40910c, 0x00000000);
 
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_GPCCS))
-			nvkm_secboot_start(sb, NVKM_SECBOOT_FALCON_GPCCS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_GPCCS))
+			nvkm_secboot_start(sb, NVKM_FALCON_GPCCS);
 		else
 			nvkm_wr32(device, 0x41a100, 0x00000002);
-		if (nvkm_secboot_is_managed(sb, NVKM_SECBOOT_FALCON_FECS))
-			nvkm_secboot_start(sb, NVKM_SECBOOT_FALCON_FECS);
+		if (nvkm_secboot_is_managed(sb, NVKM_FALCON_FECS))
+			nvkm_secboot_start(sb, NVKM_FALCON_FECS);
 		else
 			nvkm_wr32(device, 0x409100, 0x00000002);
 		if (nvkm_msec(device, 2000,
diff --git a/drm/nouveau/nvkm/engine/gr/gm200.c b/drm/nouveau/nvkm/engine/gr/gm200.c
index 6435f1257572..7f4de8e3c643 100644
--- a/drm/nouveau/nvkm/engine/gr/gm200.c
+++ b/drm/nouveau/nvkm/engine/gr/gm200.c
@@ -184,14 +184,12 @@ gm200_gr_new_(const struct gf100_gr_func *func, struct nvkm_device *device,
 		return ret;
 
 	/* Load firmwares for non-secure falcons */
-	if (!nvkm_secboot_is_managed(device->secboot,
-				     NVKM_SECBOOT_FALCON_FECS)) {
+	if (!nvkm_secboot_is_managed(device->secboot, NVKM_FALCON_FECS)) {
 		if ((ret = gf100_gr_ctor_fw(gr, "gr/fecs_inst", &gr->fuc409c)) ||
 		    (ret = gf100_gr_ctor_fw(gr, "gr/fecs_data", &gr->fuc409d)))
 			return ret;
 	}
-	if (!nvkm_secboot_is_managed(device->secboot,
-				     NVKM_SECBOOT_FALCON_GPCCS)) {
+	if (!nvkm_secboot_is_managed(device->secboot, NVKM_FALCON_GPCCS)) {
 		if ((ret = gf100_gr_ctor_fw(gr, "gr/gpccs_inst", &gr->fuc41ac)) ||
 		    (ret = gf100_gr_ctor_fw(gr, "gr/gpccs_data", &gr->fuc41ad)))
 			return ret;
diff --git a/drm/nouveau/nvkm/subdev/secboot/base.c b/drm/nouveau/nvkm/subdev/secboot/base.c
index 314be2192b7d..6b3346ff0253 100644
--- a/drm/nouveau/nvkm/subdev/secboot/base.c
+++ b/drm/nouveau/nvkm/subdev/secboot/base.c
@@ -21,18 +21,10 @@
  */
 #include "priv.h"
 
+#include <core/falcon.h>
 #include <subdev/mc.h>
 #include <subdev/timer.h>
 
-static const char *
-managed_falcons_names[] = {
-	[NVKM_SECBOOT_FALCON_PMU] = "PMU",
-	[NVKM_SECBOOT_FALCON_RESERVED] = "<reserved>",
-	[NVKM_SECBOOT_FALCON_FECS] = "FECS",
-	[NVKM_SECBOOT_FALCON_GPCCS] = "GPCCS",
-	[NVKM_SECBOOT_FALCON_END] = "<invalid>",
-};
-
 /*
  * Helper falcon functions
  */
@@ -155,7 +147,6 @@ nvkm_secboot_falcon_run(struct nvkm_secboot *sb)
 	return 0;
 }
 
-
 /**
  * nvkm_secboot_reset() - reset specified falcon
  */
@@ -190,8 +181,7 @@ nvkm_secboot_start(struct nvkm_secboot *sb, u32 falcon)
  * nvkm_secboot_is_managed() - check whether a given falcon is securely-managed
  */
 bool
-nvkm_secboot_is_managed(struct nvkm_secboot *secboot,
-			enum nvkm_secboot_falcon fid)
+nvkm_secboot_is_managed(struct nvkm_secboot *secboot, enum nvkm_falconidx fid)
 {
 	if (!secboot)
 		return false;
@@ -253,14 +243,14 @@ nvkm_secboot_ctor(const struct nvkm_secboot_func *func,
 		  struct nvkm_device *device, int index,
 		  struct nvkm_secboot *sb)
 {
-	unsigned long fid;
+	unsigned long id;
 
 	nvkm_subdev_ctor(&nvkm_secboot, device, index, &sb->subdev);
 	sb->func = func;
 
 	/* setup the performing falcon's base address and masks */
 	switch (func->boot_falcon) {
-	case NVKM_SECBOOT_FALCON_PMU:
+	case NVKM_FALCON_PMU:
 		sb->devidx = NVKM_SUBDEV_PMU;
 		sb->base = 0x10a000;
 		break;
@@ -270,9 +260,8 @@ nvkm_secboot_ctor(const struct nvkm_secboot_func *func,
 	};
 
 	nvkm_debug(&sb->subdev, "securely managed falcons:\n");
-	for_each_set_bit(fid, &sb->func->managed_falcons,
-			 NVKM_SECBOOT_FALCON_END)
-		nvkm_debug(&sb->subdev, "- %s\n", managed_falcons_names[fid]);
+	for_each_set_bit(id, &sb->func->managed_falcons, NVKM_FALCON_END)
+		nvkm_debug(&sb->subdev, "- %s\n", nvkm_falcon_name[id]);
 
 	return 0;
 }
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm200.c b/drm/nouveau/nvkm/subdev/secboot/gm200.c
index f1e2dc914366..e387673e13a6 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm200.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm200.c
@@ -87,14 +87,6 @@
 #include <core/firmware.h>
 #include <subdev/fb.h>
 
-enum {
-	FALCON_DMAIDX_UCODE		= 0,
-	FALCON_DMAIDX_VIRT		= 1,
-	FALCON_DMAIDX_PHYS_VID		= 2,
-	FALCON_DMAIDX_PHYS_SYS_COH	= 3,
-	FALCON_DMAIDX_PHYS_SYS_NCOH	= 4,
-};
-
 /**
  * struct fw_bin_header - header of firmware files
  * @bin_magic:		always 0x3b1d14f0
@@ -296,7 +288,7 @@ struct ls_ucode_img_desc {
  */
 struct ls_ucode_img {
 	struct list_head node;
-	enum nvkm_secboot_falcon falcon_id;
+	enum nvkm_falconidx falcon_id;
 
 	struct ls_ucode_img_desc ucode_desc;
 	u32 *ucode_header;
@@ -531,14 +523,14 @@ static int
 ls_ucode_img_load_fecs(struct nvkm_subdev *subdev, struct ls_ucode_img *img)
 {
 	return ls_ucode_img_load_generic(subdev, img, "fecs",
-					 NVKM_SECBOOT_FALCON_FECS);
+					 NVKM_FALCON_FECS);
 }
 
 static int
 ls_ucode_img_load_gpccs(struct nvkm_subdev *subdev, struct ls_ucode_img *img)
 {
 	return ls_ucode_img_load_generic(subdev, img, "gpccs",
-					 NVKM_SECBOOT_FALCON_GPCCS);
+					 NVKM_FALCON_GPCCS);
 }
 
 /**
@@ -564,9 +556,9 @@ ls_ucode_img_load(struct nvkm_subdev *subdev, lsf_load_func load_func)
 }
 
 static const lsf_load_func lsf_load_funcs[] = {
-	[NVKM_SECBOOT_FALCON_END] = NULL, /* reserve enough space */
-	[NVKM_SECBOOT_FALCON_FECS] = ls_ucode_img_load_fecs,
-	[NVKM_SECBOOT_FALCON_GPCCS] = ls_ucode_img_load_gpccs,
+	[NVKM_FALCON_END] = NULL, /* reserve enough space */
+	[NVKM_FALCON_FECS] = ls_ucode_img_load_fecs,
+	[NVKM_FALCON_GPCCS] = ls_ucode_img_load_gpccs,
 };
 
 /**
@@ -685,7 +677,7 @@ ls_ucode_img_fill_headers(struct gm200_secboot *gsb, struct ls_ucode_img *img,
 		lhdr->flags = LSF_FLAG_DMACTL_REQ_CTX;
 
 	/* GPCCS will be loaded using PRI */
-	if (img->falcon_id == NVKM_SECBOOT_FALCON_GPCCS)
+	if (img->falcon_id == NVKM_FALCON_GPCCS)
 		lhdr->flags |= LSF_FLAG_FORCE_PRIV_LOAD;
 
 	/* Align (size bloat) and save off BL descriptor size */
@@ -794,7 +786,7 @@ ls_ucode_mgr_write_wpr(struct gm200_secboot *gsb, struct ls_ucode_mgr *mgr,
 		pos += sizeof(img->wpr_header);
 	}
 
-	nvkm_wo32(wpr_blob, pos, NVKM_SECBOOT_FALCON_INVALID);
+	nvkm_wo32(wpr_blob, pos, NVKM_FALCON_INVALID);
 
 	nvkm_done(wpr_blob);
 
@@ -824,7 +816,7 @@ gm200_secboot_prepare_ls_blob(struct gm200_secboot *gsb)
 
 	/* Load all LS blobs */
 	for_each_set_bit(falcon_id, &gsb->base.func->managed_falcons,
-			 NVKM_SECBOOT_FALCON_END) {
+			 NVKM_FALCON_END) {
 		struct ls_ucode_img *img;
 
 		img = ls_ucode_img_load(&sb->subdev, lsf_load_funcs[falcon_id]);
@@ -1258,7 +1250,7 @@ done:
  * falcons should have their LS firmware loaded and be ready to run.
  */
 int
-gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
+gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_falconidx falcon)
 {
 	struct gm200_secboot *gsb = gm200_secboot(sb);
 	int ret;
@@ -1276,12 +1268,12 @@ gm200_secboot_reset(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
 	 * Once we have proper PMU firmware and support, this will be changed
 	 * to a proper call to the PMU method.
 	 */
-	if (falcon != NVKM_SECBOOT_FALCON_FECS)
+	if (falcon != NVKM_FALCON_FECS)
 		goto end;
 
 	/* If WPR is set and we have an unload blob, run it to unlock WPR */
 	if (gsb->acr_unload_blob &&
-	    gsb->falcon_state[NVKM_SECBOOT_FALCON_FECS] != NON_SECURE) {
+	    gsb->falcon_state[NVKM_FALCON_FECS] != NON_SECURE) {
 		ret = gm200_secboot_run_hs_blob(gsb, gsb->acr_unload_blob,
 						&gsb->acr_unload_bl_desc);
 		if (ret)
@@ -1300,16 +1292,16 @@ end:
 }
 
 int
-gm200_secboot_start(struct nvkm_secboot *sb, enum nvkm_secboot_falcon falcon)
+gm200_secboot_start(struct nvkm_secboot *sb, enum nvkm_falconidx falcon)
 {
 	struct gm200_secboot *gsb = gm200_secboot(sb);
 	int base;
 
 	switch (falcon) {
-	case NVKM_SECBOOT_FALCON_FECS:
+	case NVKM_FALCON_FECS:
 		base = 0x409000;
 		break;
-	case NVKM_SECBOOT_FALCON_GPCCS:
+	case NVKM_FALCON_GPCCS:
 		base = 0x41a000;
 		break;
 	default:
@@ -1373,11 +1365,11 @@ gm200_secboot_fini(struct nvkm_secboot *sb, bool suspend)
 
 	/* Run the unload blob to unprotect the WPR region */
 	if (gsb->acr_unload_blob &&
-	    gsb->falcon_state[NVKM_SECBOOT_FALCON_FECS] != NON_SECURE)
+	    gsb->falcon_state[NVKM_FALCON_FECS] != NON_SECURE)
 		ret = gm200_secboot_run_hs_blob(gsb, gsb->acr_unload_blob,
 						&gsb->acr_unload_bl_desc);
 
-	for (i = 0; i < NVKM_SECBOOT_FALCON_END; i++)
+	for (i = 0; i < NVKM_FALCON_END; i++)
 		gsb->falcon_state[i] = NON_SECURE;
 
 	return ret;
@@ -1409,9 +1401,9 @@ gm200_secboot = {
 	.fini = gm200_secboot_fini,
 	.reset = gm200_secboot_reset,
 	.start = gm200_secboot_start,
-	.managed_falcons = BIT(NVKM_SECBOOT_FALCON_FECS) |
-			   BIT(NVKM_SECBOOT_FALCON_GPCCS),
-	.boot_falcon = NVKM_SECBOOT_FALCON_PMU,
+	.managed_falcons = BIT(NVKM_FALCON_FECS) |
+			   BIT(NVKM_FALCON_GPCCS),
+	.boot_falcon = NVKM_FALCON_PMU,
 };
 
 /**
diff --git a/drm/nouveau/nvkm/subdev/secboot/gm20b.c b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
index d5395ebfe8d3..66a1d01f45ce 100644
--- a/drm/nouveau/nvkm/subdev/secboot/gm20b.c
+++ b/drm/nouveau/nvkm/subdev/secboot/gm20b.c
@@ -192,8 +192,8 @@ gm20b_secboot = {
 	.init = gm20b_secboot_init,
 	.reset = gm200_secboot_reset,
 	.start = gm200_secboot_start,
-	.managed_falcons = BIT(NVKM_SECBOOT_FALCON_FECS),
-	.boot_falcon = NVKM_SECBOOT_FALCON_PMU,
+	.managed_falcons = BIT(NVKM_FALCON_FECS),
+	.boot_falcon = NVKM_FALCON_PMU,
 };
 
 int
diff --git a/drm/nouveau/nvkm/subdev/secboot/priv.h b/drm/nouveau/nvkm/subdev/secboot/priv.h
index a9a8a0e1017e..b1ef3d1b4c9d 100644
--- a/drm/nouveau/nvkm/subdev/secboot/priv.h
+++ b/drm/nouveau/nvkm/subdev/secboot/priv.h
@@ -30,11 +30,11 @@ struct nvkm_secboot_func {
 	int (*init)(struct nvkm_secboot *);
 	int (*fini)(struct nvkm_secboot *, bool suspend);
 	void *(*dtor)(struct nvkm_secboot *);
-	int (*reset)(struct nvkm_secboot *, enum nvkm_secboot_falcon);
-	int (*start)(struct nvkm_secboot *, enum nvkm_secboot_falcon);
+	int (*reset)(struct nvkm_secboot *, enum nvkm_falconidx);
+	int (*start)(struct nvkm_secboot *, enum nvkm_falconidx);
 
 	/* ID of the falcon that will perform secure boot */
-	enum nvkm_secboot_falcon boot_falcon;
+	enum nvkm_falconidx boot_falcon;
 	/* Bit-mask of IDs of managed falcons */
 	unsigned long managed_falcons;
 };
@@ -191,7 +191,7 @@ struct gm200_secboot {
 		RESET,
 		/* In low-secure mode and running */
 		RUNNING,
-	} falcon_state[NVKM_SECBOOT_FALCON_END];
+	} falcon_state[NVKM_FALCON_END];
 
 	bool firmware_ok;
 };
-- 
2.10.0



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