[Nouveau] [PATCH 0/4] NV50/GF100 behind constrained hierarchies

Ben Skeggs skeggsb at gmail.com
Thu Mar 28 00:28:43 UTC 2019


On Mon, 25 Mar 2019 at 13:33, Jon Derrick <jonathan.derrick at intel.com> wrote:
>
> Hi Ben,
Hey John,

>
> I've been working with an mmio-constrained pci hierarchy intended almost
> solely for nvme devices and switches. Binding nouveau to an NV50-based
> gpu results in a kernel panic as the device cannot be fully mapped.
>
> I've made modifications in nv50 and vmm to unbind the driver from this
> hierarchy, and modified gf100 assuming it will have the same issue.
It would have the same issue indeed.

>
> 1/4 also includes a fix where nv50 doesn't look like it checks the
> return value for nvkm_vmm_new for bar1. I don't know if this was
> intentional (eg, it could work without it).
No, that's a good catch.  It would have worked at one point in time,
but would be a NULL-ptr deref since a rework that was done a while
ago.

>
> I'm wholly unfamiliar with linux graphics drivers so let me know if
> there's a better place for this.
This is the correct place, and I've merged all the patches into my tree.

Just as a note/reminder for the future (mostly to myself), we should
already be able to deal with BAR2 not being available, there's a
fallback in place already.

BAR1 is perhaps a bit trickier, but there are other (slow) HW
mechanisms available that we could use if we need to care about making
the driver work behind these hierarchies in the future.

Thank you,
Ben.

>
> Jon Derrick (4):
>   drm/nouveau/bar/nv50: check bar1 vmm return value
>   drm/nouveau/bar/nv50: ensure BAR is mapped
>   drm/nouveau/bar/gf100: ensure BAR is mapped
>   drm/nouveau/mmu: qualify vmm during dtor
>
>  drivers/gpu/drm/nouveau/nvkm/subdev/bar/gf100.c |  2 ++
>  drivers/gpu/drm/nouveau/nvkm/subdev/bar/nv50.c  | 14 +++++++++++---
>  drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmm.c   |  2 +-
>  3 files changed, 14 insertions(+), 4 deletions(-)
>
> --
> 2.14.4
>
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