[Nouveau] Understanding BAR1 Offset to imem/VRAM PA Mapping

[Joshua Bakita]

Hello,

I'm trying to understand how VRAM PAs are mapped to BAR1 offsets on
Fermi+, but I'm having difficulty digging through the abstractions in
nouveau. I spent the better part of yesterday digging through the
nv50_instobj_*() functions, but I lost track of which page tables are
being modified and where they're coming from somewhere around level 7
of indirection/aliasing from the nvkm_kmap() call (aka
nv50_instobj_acquire()) to the actual nvkm_vmm_iter() logic which I
think does the mapping.

If page tables are used to map BAR1 offsets to VRAM PAs on Fermi+, I'd
like to understand their relation to the normal GPU VA to PA page
tables, and how we tell the hardware which page tables to use for the
BAR1 mappings.

Best regards,

Joshua Bakita
PhD Student
UNC Chapel Hill | Real-Time Systems Group

(Apologies if anyone already received this email, I tried sending it
earlier and I think it got stuck in moderation.)