[Nouveau] [PATCH 04/44] drm/nouveau/mmu/gp100-: always invalidate TLBs at CACHE_LEVEL_ALL

Ben Skeggs skeggsb at gmail.com
Mon Sep 18 00:02:34 UTC 2023


On Sat, 16 Sept 2023 at 08:34, Danilo Krummrich <me at dakr.org> wrote:
>
> On 9/14/23 10:45, Ben Skeggs wrote:
> > From: Ben Skeggs <bskeggs at redhat.com>
> >
> > Fixes some issues when running on top of RM.
>
> Which issues have you seen in particular?
"random" mmu faults.

>
> Also, would it make sense to only invalidate TLBs at CACHE_LEVEL_ALL
> when actually running on top of RM?
I don't think so, I'm not entirely sure we should have been using it
to begin with.  Last I looked, RM didn't use this either (except
perhaps on UVM).

Ben.

>
> >
> > Signed-off-by: Ben Skeggs <bskeggs at redhat.com>
> > ---
> >   drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c | 2 +-
> >   drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c | 2 +-
> >   2 files changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c
> > index f3630d0e0d55..bddac77f48f0 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmgp100.c
> > @@ -558,7 +558,7 @@ gp100_vmm_invalidate_pdb(struct nvkm_vmm *vmm, u64 addr)
> >   void
> >   gp100_vmm_flush(struct nvkm_vmm *vmm, int depth)
> >   {
> > -     u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24;
> > +     u32 type = 0;
> >       if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))
> >               type |= 0x00000004; /* HUB_ONLY */
> >       type |= 0x00000001; /* PAGE_ALL */
> > diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c
> > index 6cb5eefa45e9..0095d58d4d9a 100644
> > --- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c
> > +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/vmmtu102.c
> > @@ -27,7 +27,7 @@ static void
> >   tu102_vmm_flush(struct nvkm_vmm *vmm, int depth)
> >   {
> >       struct nvkm_device *device = vmm->mmu->subdev.device;
> > -     u32 type = (5 /* CACHE_LEVEL_UP_TO_PDE3 */ - depth) << 24;
> > +     u32 type = 0;
> >
> >       type |= 0x00000001; /* PAGE_ALL */
> >       if (atomic_read(&vmm->engref[NVKM_SUBDEV_BAR]))


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