[PATCH 072/156] drm/nouveau/nvif: rework ctrl "pstate attr" api
Ben Skeggs
bskeggs at nvidia.com
Tue Apr 16 23:38:38 UTC 2024
- transition from "ioctl" interface
Signed-off-by: Ben Skeggs <bskeggs at nvidia.com>
---
.../gpu/drm/nouveau/include/nvif/driverif.h | 16 ++++++
drivers/gpu/drm/nouveau/include/nvif/if0001.h | 17 -------
drivers/gpu/drm/nouveau/nouveau_debugfs.c | 12 ++---
drivers/gpu/drm/nouveau/nvkm/device/ctrl.c | 49 +++++++------------
4 files changed, 39 insertions(+), 55 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/include/nvif/driverif.h b/drivers/gpu/drm/nouveau/include/nvif/driverif.h
index ba8b5ff9fcd6..bfa22c977323 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/driverif.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/driverif.h
@@ -23,6 +23,21 @@ struct nvif_mapinfo {
u64 length;
};
+struct nvif_control_pstate_attr {
+ u8 version;
+#define NVIF_CONTROL_PSTATE_ATTR_STATE_CURRENT (-1)
+ s8 state; /* in: index of pstate to query
+ * out: pstate identifier
+ */
+ u8 index; /* in: index of attribute to query
+ * out: index of next attribute, or 0 if no more
+ */
+ u32 min;
+ u32 max;
+ char name[32];
+ char unit[16];
+};
+
struct nvif_control_pstate_info {
u8 version;
u8 count; /* out: number of power states */
@@ -41,6 +56,7 @@ struct nvif_control_impl {
struct {
void (*info)(struct nvif_control_priv *, struct nvif_control_pstate_info *);
+ int (*attr)(struct nvif_control_priv *, struct nvif_control_pstate_attr *);
} pstate;
};
diff --git a/drivers/gpu/drm/nouveau/include/nvif/if0001.h b/drivers/gpu/drm/nouveau/include/nvif/if0001.h
index 9bb955500934..b84da0b7d079 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/if0001.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/if0001.h
@@ -2,25 +2,8 @@
#ifndef __NVIF_IF0001_H__
#define __NVIF_IF0001_H__
-#define NVIF_CONTROL_PSTATE_ATTR 0x01
#define NVIF_CONTROL_PSTATE_USER 0x02
-struct nvif_control_pstate_attr_v0 {
- __u8 version;
-#define NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT (-1)
- __s8 state; /* in: index of pstate to query
- * out: pstate identifier
- */
- __u8 index; /* in: index of attribute to query
- * out: index of next attribute, or 0 if no more
- */
- __u8 pad03[5];
- __u32 min;
- __u32 max;
- char name[32];
- char unit[16];
-};
-
struct nvif_control_pstate_user_v0 {
__u8 version;
#define NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN (-1)
diff --git a/drivers/gpu/drm/nouveau/nouveau_debugfs.c b/drivers/gpu/drm/nouveau/nouveau_debugfs.c
index caccf99f1d8a..33a64f95f64f 100644
--- a/drivers/gpu/drm/nouveau/nouveau_debugfs.c
+++ b/drivers/gpu/drm/nouveau/nouveau_debugfs.c
@@ -72,26 +72,23 @@ nouveau_debugfs_pstate_get(struct seq_file *m, void *data)
{
struct drm_device *drm = m->private;
struct nouveau_debugfs *debugfs = nouveau_debugfs(drm);
- struct nvif_object *ctrl;
struct nvif_control_pstate_info info = {};
int ret, i;
if (!debugfs)
return -ENODEV;
- ctrl = &debugfs->ctrl;
debugfs->impl->pstate.info(debugfs->priv, &info);
for (i = 0; i < info.count + 1; i++) {
const s32 state = i < info.count ? i :
- NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT;
- struct nvif_control_pstate_attr_v0 attr = {
+ NVIF_CONTROL_PSTATE_ATTR_STATE_CURRENT;
+ struct nvif_control_pstate_attr attr = {
.state = state,
.index = 0,
};
- ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_ATTR,
- &attr, sizeof(attr));
+ ret = debugfs->impl->pstate.attr(debugfs->priv, &attr);
if (ret)
return ret;
@@ -104,8 +101,7 @@ nouveau_debugfs_pstate_get(struct seq_file *m, void *data)
attr.index = 0;
do {
attr.state = state;
- ret = nvif_mthd(ctrl, NVIF_CONTROL_PSTATE_ATTR,
- &attr, sizeof(attr));
+ ret = debugfs->impl->pstate.attr(debugfs->priv, &attr);
if (ret)
return ret;
diff --git a/drivers/gpu/drm/nouveau/nvkm/device/ctrl.c b/drivers/gpu/drm/nouveau/nvkm/device/ctrl.c
index ea38592f5557..8c279cb797e9 100644
--- a/drivers/gpu/drm/nouveau/nvkm/device/ctrl.c
+++ b/drivers/gpu/drm/nouveau/nvkm/device/ctrl.c
@@ -58,36 +58,26 @@ nvkm_control_pstate_info(struct nvif_control_priv *ctrl, struct nvif_control_pst
}
static int
-nvkm_control_mthd_pstate_attr(struct nvkm_control *ctrl, void *data, u32 size)
+nvkm_control_pstate_attr(struct nvif_control_priv *ctrl, struct nvif_control_pstate_attr *attr)
{
- union {
- struct nvif_control_pstate_attr_v0 v0;
- } *args = data;
struct nvkm_clk *clk = ctrl->device->clk;
const struct nvkm_domain *domain;
struct nvkm_pstate *pstate;
struct nvkm_cstate *cstate;
int i = 0, j = -1;
u32 lo, hi;
- int ret = -ENOSYS;
- nvif_ioctl(&ctrl->object, "control pstate attr size %d\n", size);
- if (!(ret = nvif_unpack(ret, &data, &size, args->v0, 0, 0, false))) {
- nvif_ioctl(&ctrl->object,
- "control pstate attr vers %d state %d index %d\n",
- args->v0.version, args->v0.state, args->v0.index);
- if (!clk)
- return -ENODEV;
- if (args->v0.state < NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT)
- return -EINVAL;
- if (args->v0.state >= clk->state_nr)
- return -EINVAL;
- } else
- return ret;
+ if (!clk)
+ return -ENODEV;
+ if (attr->state < NVIF_CONTROL_PSTATE_ATTR_STATE_CURRENT)
+ return -EINVAL;
+ if (attr->state >= clk->state_nr)
+ return -EINVAL;
+
domain = clk->domains;
while (domain->name != nv_clk_src_max) {
- if (domain->mname && ++j == args->v0.index)
+ if (domain->mname && ++j == attr->index)
break;
domain++;
}
@@ -95,9 +85,9 @@ nvkm_control_mthd_pstate_attr(struct nvkm_control *ctrl, void *data, u32 size)
if (domain->name == nv_clk_src_max)
return -EINVAL;
- if (args->v0.state != NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT) {
+ if (attr->state != NVIF_CONTROL_PSTATE_ATTR_STATE_CURRENT) {
list_for_each_entry(pstate, &clk->states, head) {
- if (i++ == args->v0.state)
+ if (i++ == attr->state)
break;
}
@@ -108,21 +98,21 @@ nvkm_control_mthd_pstate_attr(struct nvkm_control *ctrl, void *data, u32 size)
hi = max(hi, cstate->domain[domain->name]);
}
- args->v0.state = pstate->pstate;
+ attr->state = pstate->pstate;
} else {
lo = max(nvkm_clk_read(clk, domain->name), 0);
hi = lo;
}
- snprintf(args->v0.name, sizeof(args->v0.name), "%s", domain->mname);
- snprintf(args->v0.unit, sizeof(args->v0.unit), "MHz");
- args->v0.min = lo / domain->mdiv;
- args->v0.max = hi / domain->mdiv;
+ snprintf(attr->name, sizeof(attr->name), "%s", domain->mname);
+ snprintf(attr->unit, sizeof(attr->unit), "MHz");
+ attr->min = lo / domain->mdiv;
+ attr->max = hi / domain->mdiv;
- args->v0.index = 0;
+ attr->index = 0;
while ((++domain)->name != nv_clk_src_max) {
if (domain->mname) {
- args->v0.index = ++j;
+ attr->index = ++j;
break;
}
}
@@ -164,8 +154,6 @@ nvkm_control_mthd(struct nvkm_object *object, u32 mthd, void *data, u32 size)
{
struct nvif_control_priv *ctrl = container_of(object, typeof(*ctrl), object);
switch (mthd) {
- case NVIF_CONTROL_PSTATE_ATTR:
- return nvkm_control_mthd_pstate_attr(ctrl, data, size);
case NVIF_CONTROL_PSTATE_USER:
return nvkm_control_mthd_pstate_user(ctrl, data, size);
default:
@@ -191,6 +179,7 @@ static const struct nvif_control_impl
nvkm_control_impl = {
.del = nvkm_control_del,
.pstate.info = nvkm_control_pstate_info,
+ .pstate.attr = nvkm_control_pstate_attr,
};
int
--
2.41.0
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