[PATCH 081/156] drm/nouveau/nvif: rework mmu "type" api
Ben Skeggs
bskeggs at nvidia.com
Tue Apr 16 23:38:47 UTC 2024
- transition from "ioctl" interface
Signed-off-by: Ben Skeggs <bskeggs at nvidia.com>
---
.../gpu/drm/nouveau/include/nvif/driverif.h | 13 ++++++
drivers/gpu/drm/nouveau/include/nvif/if0008.h | 15 -------
drivers/gpu/drm/nouveau/include/nvif/mmu.h | 18 +-------
drivers/gpu/drm/nouveau/nouveau_bo.c | 2 +-
drivers/gpu/drm/nouveau/nouveau_drv.h | 5 ++-
drivers/gpu/drm/nouveau/nouveau_mem.c | 4 +-
drivers/gpu/drm/nouveau/nvif/mem.c | 6 +--
drivers/gpu/drm/nouveau/nvif/mmu.c | 30 +------------
.../gpu/drm/nouveau/nvkm/subdev/mmu/ummu.c | 45 +++++++------------
9 files changed, 40 insertions(+), 98 deletions(-)
diff --git a/drivers/gpu/drm/nouveau/include/nvif/driverif.h b/drivers/gpu/drm/nouveau/include/nvif/driverif.h
index 9205c2c3b34e..fa08478cc38f 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/driverif.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/driverif.h
@@ -89,6 +89,19 @@ struct nvif_mmu_impl {
u64 size;
} heap[4];
+ struct {
+#define NVIF_MEM_VRAM 0x01
+#define NVIF_MEM_HOST 0x02
+#define NVIF_MEM_COMP 0x04
+#define NVIF_MEM_DISP 0x08
+#define NVIF_MEM_KIND 0x10
+#define NVIF_MEM_MAPPABLE 0x20
+#define NVIF_MEM_COHERENT 0x40
+#define NVIF_MEM_UNCACHED 0x80
+ u8 type;
+ u8 heap;
+ } type[16];
+
struct {
s32 oclass;
} mem;
diff --git a/drivers/gpu/drm/nouveau/include/nvif/if0008.h b/drivers/gpu/drm/nouveau/include/nvif/if0008.h
index 551bdf49d6e2..0413e7e4ca0c 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/if0008.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/if0008.h
@@ -1,23 +1,8 @@
#ifndef __NVIF_IF0008_H__
#define __NVIF_IF0008_H__
-#define NVIF_MMU_V0_TYPE 0x01
#define NVIF_MMU_V0_KIND 0x02
-struct nvif_mmu_type_v0 {
- __u8 version;
- __u8 index;
- __u8 heap;
- __u8 vram;
- __u8 host;
- __u8 comp;
- __u8 disp;
- __u8 kind;
- __u8 mappable;
- __u8 coherent;
- __u8 uncached;
-};
-
struct nvif_mmu_kind_v0 {
__u8 version;
__u8 kind_inv;
diff --git a/drivers/gpu/drm/nouveau/include/nvif/mmu.h b/drivers/gpu/drm/nouveau/include/nvif/mmu.h
index ff4938911621..203328a2d611 100644
--- a/drivers/gpu/drm/nouveau/include/nvif/mmu.h
+++ b/drivers/gpu/drm/nouveau/include/nvif/mmu.h
@@ -8,23 +8,9 @@ struct nvif_mmu {
const struct nvif_mmu_impl *impl;
struct nvif_mmu_priv *priv;
struct nvif_object object;
- u8 type_nr;
u8 kind_inv;
u16 kind_nr;
- struct {
-#define NVIF_MEM_VRAM 0x01
-#define NVIF_MEM_HOST 0x02
-#define NVIF_MEM_COMP 0x04
-#define NVIF_MEM_DISP 0x08
-#define NVIF_MEM_KIND 0x10
-#define NVIF_MEM_MAPPABLE 0x20
-#define NVIF_MEM_COHERENT 0x40
-#define NVIF_MEM_UNCACHED 0x80
- u8 type;
- u8 heap;
- } *type;
-
u8 *kind;
};
@@ -45,8 +31,8 @@ static inline int
nvif_mmu_type(struct nvif_mmu *mmu, u8 mask)
{
int i;
- for (i = 0; i < mmu->type_nr; i++) {
- if ((mmu->type[i].type & mask) == mask)
+ for (i = 0; i < mmu->impl->type_nr; i++) {
+ if ((mmu->impl->type[i].type & mask) == mask)
return i;
}
return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nouveau_bo.c b/drivers/gpu/drm/nouveau/nouveau_bo.c
index cbb8f54db83f..08d522aaae38 100644
--- a/drivers/gpu/drm/nouveau/nouveau_bo.c
+++ b/drivers/gpu/drm/nouveau/nouveau_bo.c
@@ -1212,7 +1212,7 @@ nouveau_ttm_io_mem_reserve(struct ttm_device *bdev, struct ttm_resource *reg)
/* Some BARs do not support being ioremapped WC */
if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA &&
- mmu->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED)
+ mmu->impl->type[drm->ttm.type_vram].type & NVIF_MEM_UNCACHED)
reg->bus.caching = ttm_uncached;
else
reg->bus.caching = ttm_write_combined;
diff --git a/drivers/gpu/drm/nouveau/nouveau_drv.h b/drivers/gpu/drm/nouveau/nouveau_drv.h
index 38d33a4d5c49..823fa6d87690 100644
--- a/drivers/gpu/drm/nouveau/nouveau_drv.h
+++ b/drivers/gpu/drm/nouveau/nouveau_drv.h
@@ -318,8 +318,9 @@ nouveau_drm(struct drm_device *dev)
static inline bool
nouveau_drm_use_coherent_gpu_mapping(struct nouveau_drm *drm)
{
- struct nvif_mmu *mmu = &drm->client.mmu;
- return !(mmu->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
+ struct nvif_mmu *mmu = &drm->mmu;
+
+ return !(mmu->impl->type[drm->ttm.type_host[0]].type & NVIF_MEM_UNCACHED);
}
int nouveau_pmops_suspend(struct device *);
diff --git a/drivers/gpu/drm/nouveau/nouveau_mem.c b/drivers/gpu/drm/nouveau/nouveau_mem.c
index 75abd545c92d..554500a650db 100644
--- a/drivers/gpu/drm/nouveau/nouveau_mem.c
+++ b/drivers/gpu/drm/nouveau/nouveau_mem.c
@@ -100,9 +100,9 @@ nouveau_mem_host(struct ttm_resource *reg, struct ttm_tt *tt)
else
type = drm->ttm.type_host[0];
- if (mem->kind && !(mmu->type[type].type & NVIF_MEM_KIND))
+ if (mem->kind && !(mmu->impl->type[type].type & NVIF_MEM_KIND))
mem->comp = mem->kind = 0;
- if (mem->comp && !(mmu->type[type].type & NVIF_MEM_COMP)) {
+ if (mem->comp && !(mmu->impl->type[type].type & NVIF_MEM_COMP)) {
if (mmu->object.oclass >= NVIF_CLASS_MMU_GF100)
mem->kind = mmu->kind[mem->kind];
mem->comp = 0;
diff --git a/drivers/gpu/drm/nouveau/nvif/mem.c b/drivers/gpu/drm/nouveau/nvif/mem.c
index 0f0b4a7c5e80..600fe051be11 100644
--- a/drivers/gpu/drm/nouveau/nvif/mem.c
+++ b/drivers/gpu/drm/nouveau/nvif/mem.c
@@ -72,7 +72,7 @@ nvif_mem_ctor_type(struct nvif_mmu *mmu, const char *name,
ret = nvif_object_ctor(&mmu->object, name ? name : "nvifMem", 0, mmu->impl->mem.oclass,
args, sizeof(*args) + argc, &mem->object);
if (ret == 0) {
- mem->type = mmu->type[type].type;
+ mem->type = mmu->impl->type[type].type;
mem->page = args->page;
mem->addr = args->addr;
mem->size = args->size;
@@ -92,8 +92,8 @@ nvif_mem_ctor(struct nvif_mmu *mmu, const char *name, u8 type,
mem->object.client = NULL;
- for (i = 0; ret && i < mmu->type_nr; i++) {
- if ((mmu->type[i].type & type) == type) {
+ for (i = 0; ret && i < mmu->impl->type_nr; i++) {
+ if ((mmu->impl->type[i].type & type) == type) {
ret = nvif_mem_ctor_type(mmu, name, i, page,
size, argv, argc, mem);
}
diff --git a/drivers/gpu/drm/nouveau/nvif/mmu.c b/drivers/gpu/drm/nouveau/nvif/mmu.c
index ec5ec8be98c0..e727a6587658 100644
--- a/drivers/gpu/drm/nouveau/nvif/mmu.c
+++ b/drivers/gpu/drm/nouveau/nvif/mmu.c
@@ -33,7 +33,6 @@ nvif_mmu_dtor(struct nvif_mmu *mmu)
return;
kfree(mmu->kind);
- kfree(mmu->type);
mmu->impl->del(mmu->priv);
mmu->impl = NULL;
}
@@ -42,10 +41,9 @@ int
nvif_mmu_ctor(struct nvif_device *device, const char *name, struct nvif_mmu *mmu)
{
const s32 oclass = device->impl->mmu.oclass;
- int ret, i;
+ int ret;
mmu->impl = NULL;
- mmu->type = NULL;
mmu->kind = NULL;
ret = device->impl->mmu.new(device->priv, &mmu->impl, &mmu->priv,
@@ -56,39 +54,13 @@ nvif_mmu_ctor(struct nvif_device *device, const char *name, struct nvif_mmu *mmu
nvif_object_ctor(&device->object, name ?: "nvifMmu", 0, oclass, &mmu->object);
- mmu->type_nr = mmu->impl->type_nr;
mmu->kind_nr = mmu->impl->kind_nr;
- mmu->type = kmalloc_array(mmu->type_nr, sizeof(*mmu->type),
- GFP_KERNEL);
- if (ret = -ENOMEM, !mmu->type)
- goto done;
-
mmu->kind = kmalloc_array(mmu->kind_nr, sizeof(*mmu->kind),
GFP_KERNEL);
if (!mmu->kind && mmu->kind_nr)
goto done;
- for (i = 0; i < mmu->type_nr; i++) {
- struct nvif_mmu_type_v0 args = { .index = i };
-
- ret = nvif_object_mthd(&mmu->object, NVIF_MMU_V0_TYPE,
- &args, sizeof(args));
- if (ret)
- goto done;
-
- mmu->type[i].type = 0;
- if (args.vram) mmu->type[i].type |= NVIF_MEM_VRAM;
- if (args.host) mmu->type[i].type |= NVIF_MEM_HOST;
- if (args.comp) mmu->type[i].type |= NVIF_MEM_COMP;
- if (args.disp) mmu->type[i].type |= NVIF_MEM_DISP;
- if (args.kind ) mmu->type[i].type |= NVIF_MEM_KIND;
- if (args.mappable) mmu->type[i].type |= NVIF_MEM_MAPPABLE;
- if (args.coherent) mmu->type[i].type |= NVIF_MEM_COHERENT;
- if (args.uncached) mmu->type[i].type |= NVIF_MEM_UNCACHED;
- mmu->type[i].heap = args.heap;
- }
-
if (mmu->kind_nr) {
struct nvif_mmu_kind_v0 *kind;
size_t argc = struct_size(kind, data, mmu->kind_nr);
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.c b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.c
index 9a42721eabd8..8be5b1034bc1 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/ummu.c
@@ -53,35 +53,6 @@ nvkm_ummu_sclass(struct nvkm_object *object, int index,
return -EINVAL;
}
-static int
-nvkm_ummu_type(struct nvkm_ummu *ummu, void *argv, u32 argc)
-{
- struct nvkm_mmu *mmu = ummu->mmu;
- union {
- struct nvif_mmu_type_v0 v0;
- } *args = argv;
- int ret = -ENOSYS;
- u8 type, index;
-
- if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
- if ((index = args->v0.index) >= mmu->type_nr)
- return -EINVAL;
- type = mmu->type[index].type;
- args->v0.heap = mmu->type[index].heap;
- args->v0.vram = !!(type & NVKM_MEM_VRAM);
- args->v0.host = !!(type & NVKM_MEM_HOST);
- args->v0.comp = !!(type & NVKM_MEM_COMP);
- args->v0.disp = !!(type & NVKM_MEM_DISP);
- args->v0.kind = !!(type & NVKM_MEM_KIND);
- args->v0.mappable = !!(type & NVKM_MEM_MAPPABLE);
- args->v0.coherent = !!(type & NVKM_MEM_COHERENT);
- args->v0.uncached = !!(type & NVKM_MEM_UNCACHED);
- } else
- return ret;
-
- return 0;
-}
-
static int
nvkm_ummu_kind(struct nvkm_ummu *ummu, void *argv, u32 argc)
{
@@ -127,7 +98,6 @@ nvkm_ummu_mthd(struct nvkm_object *object, u32 mthd, void *argv, u32 argc)
{
struct nvif_mmu_priv *ummu = container_of(object, typeof(*ummu), object);
switch (mthd) {
- case NVIF_MMU_V0_TYPE: return nvkm_ummu_type(ummu, argv, argc);
case NVIF_MMU_V0_KIND: return nvkm_ummu_kind(ummu, argv, argc);
default:
break;
@@ -164,9 +134,24 @@ nvkm_ummu_new(struct nvkm_device *device, const struct nvif_mmu_impl **pimpl,
ummu->impl.heap_nr = mmu->heap_nr;
ummu->impl.type_nr = mmu->type_nr;
ummu->impl.kind_nr = kinds;
+
for (int i = 0; i < mmu->heap_nr; i++)
ummu->impl.heap[i].size = mmu->heap[i].size;
+ for (int i = 0; i < mmu->type_nr; i++) {
+ u8 type = mmu->type[i].type;
+
+ ummu->impl.type[i].type |= (type & NVKM_MEM_VRAM) ? NVIF_MEM_VRAM : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_HOST) ? NVIF_MEM_HOST : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_COMP) ? NVIF_MEM_COMP : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_DISP) ? NVIF_MEM_DISP : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_KIND) ? NVIF_MEM_KIND : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_MAPPABLE) ? NVIF_MEM_MAPPABLE : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_COHERENT) ? NVIF_MEM_COHERENT : 0;
+ ummu->impl.type[i].type |= (type & NVKM_MEM_UNCACHED) ? NVIF_MEM_UNCACHED : 0;
+ ummu->impl.type[i].heap = mmu->type[i].heap;
+ }
+
ummu->impl.mem.oclass = mmu->func->mem.user.oclass;
ummu->impl.vmm.oclass = mmu->func->vmm.user.oclass;
--
2.41.0
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