[Openchrome-devel] [PATCH] Add basic VX855 support to Openchrome
Harald Welte
HaraldWelte
Mon May 18 23:31:22 PDT 2009
[PATCH] Add basic VX855 support to Openchrome
This patch adds support for the new VX855 chipset. It makes
Openchrome treat VX855 almost the same way like a VX800. The big
difference is the PLL configuration, which is once again different
for this generation of hardware.
Signed-off-by: Harald Welte <HaraldWelte at viatech.com>
Index: trunk/src/via_id.h
===================================================================
--- trunk/src/via_id.h (revision 747)
+++ trunk/src/via_id.h (working copy)
@@ -38,6 +38,7 @@
VIA_CX700,
VIA_P4M890,
VIA_VX800,
+ VIA_VX855,
VIA_LAST
};
@@ -54,6 +55,7 @@
#define PCI_CHIP_VT3324 0x3157 /* CX700 */
#define PCI_CHIP_VT3327 0x3343 /* P4M890 */
#define PCI_CHIP_VT3353 0x1122 /* VX800 */
+#define PCI_CHIP_VT3409 0x5122 /* VX855/VX875 */
/* There is some conflicting information about the two major revisions of
* the CLE266, often labelled Ax and Cx. The dividing line seems to be
Index: trunk/src/via_video.c
===================================================================
--- trunk/src/via_video.c (revision 747)
+++ trunk/src/via_video.c (working copy)
@@ -277,6 +277,7 @@
pVia->ChipId != PCI_CHIP_VT3314 &&
pVia->ChipId != PCI_CHIP_VT3327 &&
pVia->ChipId != PCI_CHIP_VT3336 &&
+ pVia->ChipId != PCI_CHIP_VT3409 &&
pVia->ChipId != PCI_CHIP_VT3364 &&
pVia->ChipId != PCI_CHIP_VT3324 &&
pVia->ChipId != PCI_CHIP_VT3353) {
Index: trunk/src/via_mode.c
===================================================================
--- trunk/src/via_mode.c (revision 747)
+++ trunk/src/via_mode.c (working copy)
@@ -371,17 +371,20 @@
}
}
- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800)) {
-
- if (ViaDFPDetect(pScrn)) {
- pBIOSInfo->DfpPresent = TRUE;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "DFP is connected.\n");
- } else {
- pBIOSInfo->DfpPresent = FALSE;
- xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "DFP is disconnected.\n");
- }
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ case VIA_VX800:
+ case VIA_VX855:
+ if (ViaDFPDetect(pScrn)) {
+ pBIOSInfo->DfpPresent = TRUE;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DFP is connected.\n");
+ } else {
+ pBIOSInfo->DfpPresent = FALSE;
+ xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "DFP is disconnected.\n");
+ }
+ break;
}
}
@@ -496,8 +499,14 @@
pBIOSInfo->FirstCRTC->IsActive = TRUE ;
if (pBIOSInfo->Panel->IsActive) {
pVia->pBIOSInfo->SecondCRTC->IsActive = TRUE ;
- if (pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_CX700 || pVia->Chipset == VIA_VX800 )
- pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
+ switch (pVia->Chipset) {
+ case VIA_P4M900:
+ case VIA_CX700:
+ case VIA_VX800:
+ case VIA_VX855:
+ pVia->pBIOSInfo->Lvds->IsActive = TRUE ;
+ break;
+ }
}
}
@@ -1347,6 +1356,11 @@
"ViaComputeDotClock %d : %04x : %04x\n",
mode->Clock, best1, best2));
return best2;
+ } else if (pVia->Chipset == VIA_VX855) {
+ for (i = 0; ViaDotClocks[i].DotClock; i++)
+ if (ViaDotClocks[i].DotClock == mode->Clock &&
+ ViaDotClocks[i].Chrome9HC)
+ return ViaDotClocks[i].Chrome9HC;
} else {
for (i = 0; ViaDotClocks[i].DotClock; i++)
if (ViaDotClocks[i].DotClock == mode->Clock)
Index: trunk/src/via_mode.h
===================================================================
--- trunk/src/via_mode.h (revision 747)
+++ trunk/src/via_mode.h (working copy)
@@ -44,49 +44,55 @@
int DotClock;
CARD16 UniChrome;
CARD32 UniChromePro;
+ CARD32 Chrome9HC;
} ViaDotClocks[] = {
{ 25200, 0x513C, 0xa79004 },
{ 25312, 0xC763, 0xc49005 },
{ 26591, 0x471A, 0xce9005 },
- { 31500, 0xC558, 0xae9003 },
+ { 31500, 0xC558, 0xae9003, 0xb01005 },
{ 31704, 0x471F, 0xaf9002 },
{ 32663, 0xC449, 0x479000 },
- { 33750, 0x4721, 0x959002 },
+ { 33750, 0x4721, 0x959002, 0x921004 },
{ 35500, 0x5877, 0x759001 },
- { 36000, 0x5879, 0x9f9002 },
+ { 36000, 0x5879, 0x9f9002, 0xa11004 },
{ 39822, 0xC459, 0x578c02 },
- { 40000, 0x515F, 0x848c04 },
+ { 40000, 0x515F, 0x848c04, 0x700c05 },
{ 41164, 0x4417, 0x2c8c00 },
- { 46981, 0x5069, 0x678c02 },
- { 49500, 0xC353, 0xa48c04 },
+ { 46981, 0x5069, 0x678c02, 0x690c04 },
+ { 49500, 0xC353, 0xa48c04, 0x530c03 },
{ 50000, 0xC354, 0x368c00 },
- { 56300, 0x4F76, 0x3d8c00 },
+ { 56300, 0x4F76, 0x3d8c00, 0x9d0c05 },
{ 57284, 0x4E70, 0x3e8c00 },
- { 64995, 0x0D3B, 0x6b8c01 },
- { 65000, 0x0D3B, 0x6b8c01 }, /* Slightly unstable on PM800 */
+ { 64995, 0x0D3B, 0x6b8c01, 0x6d0c03 },
+ { 65000, 0x0D3B, 0x6b8c01, 0x6d0c03 }, /* Slightly unstable on PM800 */
{ 65028, 0x866D, 0x6b8c01 },
- { 74480, 0x156E, 0x288800 },
+ { 74480, 0x156E, 0x288800, 0xd10c05 },
{ 75000, 0x156E, 0x288800 },
- { 78800, 0x442C, 0x2a8800 },
+ { 78800, 0x442C, 0x2a8800, 0x6e0805 },
{ 81135, 0x0622, 0x428801 },
- { 81613, 0x4539, 0x708803 },
- { 94500, 0x4542, 0x4d8801 },
- { 108000, 0x0B53, 0x778802 },
+ { 81613, 0x4539, 0x708803, 0x720805 },
+ { 94500, 0x4542, 0x4d8801, 0x840805 },
+ { 108000, 0x0B53, 0x778802, 0x970805 },
{ 108280, 0x4879, 0x778802 },
{ 122000, 0x0D6F, 0x428800 },
- { 122726, 0x073C, 0x878802 },
- { 135000, 0x0742, 0x6f8801 },
- { 148500, 0x0853, 0x518800 },
+ { 122726, 0x073C, 0x878802, 0xac0805 },
+ { 135000, 0x0742, 0x6f8801, 0xbd0805},
+ { 148500, 0x0853, 0x518800, 0xd00805},
{ 155800, 0x0857, 0x558402 },
- { 157500, 0x422C, 0x2a8400 },
+ { 157500, 0x422C, 0x2a8400, 0x6e0405 },
{ 161793, 0x4571, 0x6f8403 },
- { 162000, 0x0A71, 0x6f8403 },
+ { 162000, 0x0A71, 0x6f8403, 0x710405 },
{ 175500, 0x4231, 0x2f8400 },
{ 189000, 0x0542, 0x4d8401 },
- { 202500, 0x0763, 0x6F8402 },
+ { 202500, 0x0763, 0x6F8402, 0x8e0405 },
{ 204800, 0x0764, 0x548401 },
- { 218300, 0x043D, 0x3b8400 },
- { 229500, 0x0660, 0x3e8400 }, /* Not tested on Pro */
+ { 218300, 0x043D, 0x3b8400, 0x990405 },
+ { 229500, 0x0660, 0x3e8400, 0xa10405 }, /* Not tested on Pro */
+ { 234000, 0, 0xa20403, 0xa40405 },
+ { 267250, 0, 0xb90403, 0xbb0405 },
+ { 297500, 0, 0xce0403, 0xd00405 },
+ { 339500, 0, 0x5d0002, 0x770005 },
+ { 340772, 0, 0x750003, 0x770005 },
{ 0, 0, 0 }
};
Index: trunk/src/via_driver.c
===================================================================
--- trunk/src/via_driver.c (revision 747)
+++ trunk/src/via_driver.c (working copy)
@@ -164,6 +164,7 @@
{VIA_CX700, "CX700/VX700"},
{VIA_P4M890, "P4M890"},
{VIA_VX800, "VX800"},
+ {VIA_VX855, "VX855"},
{-1, NULL }
};
@@ -179,6 +180,7 @@
{VIA_CX700, PCI_CHIP_VT3324, RES_SHARED_VGA},
{VIA_P4M890, PCI_CHIP_VT3327, RES_SHARED_VGA},
{VIA_VX800, PCI_CHIP_VT3353, RES_SHARED_VGA},
+ {VIA_VX855, PCI_CHIP_VT3409, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED}
};
@@ -908,6 +910,7 @@
pVia->UseLegacyModeSwitch = FALSE;
break;
case VIA_VX800:
+ case VIA_VX855:
pVia->VideoEngine = VIDEO_ENGINE_CME;
/* pVia->agpEnable = FALSE;
pVia->dmaXV = FALSE;*/
@@ -1180,6 +1183,7 @@
case VIA_P4M900:
case VIA_CX700:
case VIA_VX800:
+ case VIA_VX855:
#ifdef XSERVER_LIBPCIACCESS
pci_device_cfg_read_u8(vgaDevice, &videoRam, 0xA1);
#else
@@ -1926,8 +1930,16 @@
viaAccelSync(pScrn);
/* A soft reset helps to avoid a 3D hang on VT switch. */
- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 && pVia->Chipset != VIA_VX800)
- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ break;
+ default:
+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ break;
+ }
#ifdef XF86DRI
if (pVia->directRenderingEnabled) {
@@ -2103,8 +2115,13 @@
}
/* Save TMDS status */
- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800))
- Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ case VIA_VX800:
+ case VIA_VX855:
+ Regs->CRD2 = hwp->readCrtc(hwp, 0xD2);
+ break;
+ }
vgaHWProtect(pScrn, FALSE);
}
@@ -2219,8 +2236,13 @@
}
/* Restore TMDS status */
- if ((pVia->Chipset == VIA_CX700) || (pVia->Chipset == VIA_VX800))
- hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ case VIA_VX800:
+ case VIA_VX855:
+ hwp->writeCrtc(hwp, 0xD2, Regs->CRD2);
+ break;
+ }
if (pBIOSInfo->Panel->IsActive)
ViaLCDPower(pScrn, TRUE);
@@ -2245,6 +2267,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
ViaSeqMask(hwp, 0x1A, 0x08, 0x08);
break;
default:
@@ -2267,6 +2290,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
ViaSeqMask(hwp, 0x1A, 0x00, 0x08);
break;
default:
@@ -2956,13 +2980,19 @@
* to detect when the display is using the secondary head.
* TODO: This should be enabled for other chipsets as well.
*/
- if ((pVia->Chipset == VIA_P4M900 || pVia->Chipset == VIA_VX800) && pVia->pBIOSInfo->Panel->IsActive) {
- /*
- * Since we are using virtual, we need to adjust
- * the offset to match the framebuffer alignment.
- */
- if (pScrn->displayWidth != mode->CrtcHDisplay)
- ViaSecondCRTCHorizontalOffset(pScrn);
+ if (pVia->pBIOSInfo->Panel->IsActive) {
+ switch (pVia->Chipset) {
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ /*
+ * Since we are using virtual, we need to adjust
+ * the offset to match the framebuffer alignment.
+ */
+ if (pScrn->displayWidth != mode->CrtcHDisplay)
+ ViaSecondCRTCHorizontalOffset(pScrn);
+ break;
+ }
}
}
@@ -2996,9 +3026,14 @@
viaAccelSync(pScrn);
/* A soft reset avoids a 3D hang after X restart. */
- if (pVia->Chipset != VIA_K8M890 && pVia->Chipset != VIA_P4M900 &&
- pVia->Chipset != VIA_VX800)
- hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ switch (pVia->Chipset) {
+ case VIA_K8M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ hwp->writeSeq(hwp, 0x1A, pVia->SavedReg.SR1A | 0x40);
+ break;
+ }
if (!pVia->IsSecondary) {
/* Turn off all video activities. */
Index: trunk/src/via_crtc.c
===================================================================
--- trunk/src/via_crtc.c (revision 747)
+++ trunk/src/via_crtc.c (working copy)
@@ -173,6 +173,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
break;
default:
ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -276,6 +277,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
break;
default:
/* some leftovers */
@@ -310,6 +312,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
break;
default:
/* some leftovers */
@@ -429,6 +432,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
break;
default:
ViaSeqMask(hwp, 0x16, 0x08, 0xBF);
@@ -512,6 +516,7 @@
case VIA_CX700:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
break;
default:
/* some leftovers */
Index: trunk/src/via_swov.c
===================================================================
--- trunk/src/via_swov.c (revision 747)
+++ trunk/src/via_swov.c (working copy)
@@ -282,6 +282,7 @@
HWDiff->dwNeedV1Prefetch = VID_HWDIFF_FALSE;
break;
case VIA_VX800:
+ case VIA_VX855:
HWDiff->dwThreeHQVBuffer = VID_HWDIFF_TRUE;
HWDiff->dwHQVFetchByteUnit = VID_HWDIFF_TRUE;
HWDiff->dwSupportTwoColorKey = VID_HWDIFF_TRUE;
@@ -784,6 +785,7 @@
case PCI_CHIP_VT3324:
case PCI_CHIP_VT3327:
case PCI_CHIP_VT3353:
+ case PCI_CHIP_VT3409:
model = 0;
break;
case PCI_CHIP_CLE3122:
@@ -922,6 +924,7 @@
case PCI_CHIP_VT3324:
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
+ case PCI_CHIP_VT3409:
case PCI_CHIP_CLE3122:
VIDOutD(V1_ColorSpaceReg_2, col2);
VIDOutD(V1_ColorSpaceReg_1, col1);
@@ -951,6 +954,7 @@
case PCI_CHIP_VT3324:
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
+ case PCI_CHIP_VT3409:
return (VIDEO_HQV_INUSE | SW_USE_HQV | VIDEO_1_INUSE
| VIDEO_ACTIVE | VIDEO_SHOW);
case PCI_CHIP_CLE3122:
@@ -990,6 +994,8 @@
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3336;
+ case PCI_CHIP_VT3409:
+ return V3_ENABLE | VIDEO_EXPIRE_NUM_VT3409;
case PCI_CHIP_CLE3122:
if (CLE266_REV_IS_CX(pVia->ChipRev))
return V3_ENABLE | V3_EXPIRE_NUM_F;
@@ -1335,6 +1341,7 @@
case PCI_CHIP_VT3324:
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
+ case PCI_CHIP_VT3409:
SetFIFO_V3(pVia, 225, 200, 250);
break;
case PCI_CHIP_VT3204:
@@ -1367,6 +1374,7 @@
case PCI_CHIP_VT3324:
case PCI_CHIP_VT3364:
case PCI_CHIP_VT3353:
+ case PCI_CHIP_VT3409:
SetFIFO_V3(pVia, 225, 200, 250);
break;
case PCI_CHIP_VT3204:
@@ -2011,7 +2019,7 @@
if (pVia->VideoEngine == VIDEO_ENGINE_CME) {
VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL1,0);
VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL3,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
- if (pVia->Chipset == VIA_VX800) {
+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL2,0);
VIDOutD(HQV_SRC_DATA_OFFSET_CONTROL4,((pUpdate->SrcRight - 1 ) << 16) | (pUpdate->SrcBottom - 1));
}
Index: trunk/src/via_bandwidth.c
===================================================================
--- trunk/src/via_bandwidth.c (revision 747)
+++ trunk/src/via_bandwidth.c (working copy)
@@ -239,6 +239,7 @@
hwp->writeSeq(hwp, 0x22, 0x1F);
break;
case VIA_VX800:
+ case VIA_VX855:
hwp->writeSeq(hwp, 0x16, 0x26); /* 152/4 = 38 */
hwp->writeSeq(hwp, 0x17, 0x5F); /* 192/2-1 = 95 */
hwp->writeSeq(hwp, 0x18, 0x26); /* 152/4 = 38 */
@@ -396,6 +397,7 @@
ViaCrtcMask(hwp, 0x94, 0x20, 0x7F);
break;
case VIA_VX800:
+ case VIA_VX855:
/* {CR68,4,7},{CR94,7,7},{CR95,7,7} : 96/8-1 = 0x0B */
ViaCrtcMask(hwp, 0x68, 0xA0, 0xF0);
ViaCrtcMask(hwp, 0x94, 0x00, 0x80);
Index: trunk/src/via_accel.c
===================================================================
--- trunk/src/via_accel.c (revision 747)
+++ trunk/src/via_accel.c (working copy)
@@ -195,6 +195,7 @@
*/
switch (pVia->Chipset) {
case VIA_VX800:
+ case VIA_VX855:
while ((VIAGETREG(VIA_REG_STATUS) &
(VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5))
&& (loop++ < MAXLOOP)) ;
@@ -471,7 +472,7 @@
VIASETREG(i, 0x0);
}
- if (pVia->Chipset == VIA_VX800) {
+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855) {
for (i = 0x44; i < 0x5c; i += 4) {
VIASETREG(i, 0x0);
}
@@ -480,6 +481,7 @@
/* Make the VIA_REG() macro magic work */
switch (pVia->Chipset) {
case VIA_VX800:
+ case VIA_VX855:
pVia->TwodRegs = via_2d_regs_m1;
break;
default:
@@ -527,6 +529,7 @@
switch (pVia->Chipset) {
case VIA_VX800:
+ case VIA_VX855:
while ((VIAGETREG(VIA_REG_STATUS) &
(VIA_CMD_RGTR_BUSY_H5 | VIA_2D_ENG_BUSY_H5 | VIA_3D_ENG_BUSY_H5))
&& (loop++ < MAXLOOP)) ;
@@ -587,7 +590,7 @@
unsigned val = (dstPitch >> 3) << 16 | (srcPitch >> 3);
RING_VARS;
- if (pVia->Chipset != VIA_VX800) {
+ if (pVia->Chipset != VIA_VX800 && pVia->Chipset != VIA_VX855) {
val |= VIA_PITCH_ENABLE;
}
OUT_RING_H1(VIA_REG(pVia, PITCH), val);
@@ -1299,7 +1302,7 @@
xaaptr->SubsequentImageWriteRect = viaSubsequentImageWriteRect;
xaaptr->ImageWriteBase = pVia->BltBase;
- if (pVia->Chipset == VIA_VX800)
+ if (pVia->Chipset == VIA_VX800 || pVia->Chipset == VIA_VX855)
xaaptr->ImageWriteRange = VIA_MMIO_BLTSIZE;
else
xaaptr->ImageWriteRange = (64 * 1024);
Index: trunk/src/via_cursor.c
===================================================================
--- trunk/src/via_cursor.c (revision 747)
+++ trunk/src/via_cursor.c (working copy)
@@ -97,6 +97,7 @@
case VIA_P4M890:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
pVia->CursorRegControl = VIA_REG_HI_CONTROL0;
pVia->CursorRegBase = VIA_REG_HI_BASE0;
@@ -164,6 +165,7 @@
case VIA_P4M890:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, 0x00FFFFFF);
VIASETREG(VIA_REG_V327_HI_INVTCOLOR, 0x00FFFFFF);
@@ -222,6 +224,7 @@
case VIA_P4M890:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
pVia->CursorPrimHiInvtColor = VIAGETREG(VIA_REG_PRIM_HI_INVTCOLOR);
pVia->CursorV327HiInvtColor = VIAGETREG(VIA_REG_V327_HI_INVTCOLOR);
@@ -261,6 +264,7 @@
case VIA_P4M890:
case VIA_P4M900:
case VIA_VX800:
+ case VIA_VX855:
if (pVia->pBIOSInfo->FirstCRTC->IsActive) {
VIASETREG(VIA_REG_PRIM_HI_INVTCOLOR, pVia->CursorPrimHiInvtColor);
VIASETREG(VIA_REG_V327_HI_INVTCOLOR, pVia->CursorV327HiInvtColor);
Index: trunk/src/via.h
===================================================================
--- trunk/src/via.h (revision 747)
+++ trunk/src/via.h (working copy)
@@ -327,6 +327,12 @@
#define VIDEO_FIFO_PRETHRESHOLD_VT3336 250
#define VIDEO_EXPIRE_NUM_VT3336 31
+/* Those values are only valid for IGA1 */
+#define VIDEO_FIFO_DEPTH_VT3409 400
+#define VIDEO_FIFO_THRESHOLD_VT3409 320
+#define VIDEO_FIFO_PRETHRESHOLD_VT3409 230
+#define VIDEO_EXPIRE_NUM_VT3409 160
+
/* ALPHA_V3_FIFO_CONTROL 0x278
* IA2 has 32 level FIFO for packet mode video format
* 32 level FIFO for planar mode video YV12. with extension reg 230 bit 21 enable
Index: trunk/src/via_id.c
===================================================================
--- trunk/src/via_id.c (revision 747)
+++ trunk/src/via_id.c (working copy)
@@ -221,6 +221,9 @@
{"Samsung NC20", VIA_VX800, 0x144d, 0xc04e, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
{"Quanta DreamBook Light IL1", VIA_VX800, 0x152d, 0x0771, VIA_DEVICE_CRT | VIA_DEVICE_LCD},
+ /*** VX855 ***/
+ {"VIA VT8562C", VIA_VX855, 0x1106, 0x5122, VIA_DEVICE_CRT},
+
/* keep this */
{NULL, VIA_UNKNOWN, 0x0000, 0x0000, VIA_DEVICE_NONE}
};
--
- Harald Welte <HaraldWelte at viatech.com> http://linux.via.com.tw/
============================================================================
VIA Open Source Liaison
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