[Openchrome-devel] xf86-video-openchrome: 2 commits - src/via_display.c src/via_driver.h src/via_vbe.c src/via_xv.c tools/registers.c

[Xavier Bachelot]

 src/via_display.c |    4 ----
 src/via_driver.h  |    1 -
 src/via_vbe.c     |    2 --
 src/via_xv.c      |   19 +++++++++++--------
 tools/registers.c |    6 +++---
 5 files changed, 14 insertions(+), 18 deletions(-)

New commits:
commit 84cf9bbfa3c8a192fe52ff2f378e421037e608bc
Author: Xavier Bachelot <xavier at bachelot.org>
Date:   Mon Dec 3 00:14:38 2012 +0100

    Fix registers description

diff --git a/tools/registers.c b/tools/registers.c
index f0efd0d..4bd1ebc 100644
--- a/tools/registers.c
+++ b/tools/registers.c
@@ -185,8 +185,8 @@ struct io_reg crtc_regs = {
 		[0x64] = { "Second Display Starting Address High", },
 		[0x65] = { "Second Display Horizontal Quadword Count", },
 		[0x66] = { "Second Display Horizontal Offset", },
-		[0x67] = { "Second Display Col Depth and Horiz Overfl", },
-		[0x68] = { "Second Display Queue Depth and Read Thresh", },
+		[0x67] = { "Second Display Color Depth and Horizontal Overflow", },
+		[0x68] = { "Second Display Queue Depth and Read Threshold", },
 		[0x69] = { "Second Display Interrupt Enable and Status", },
 		[0x6a] = { "Second Display Channel and LCD Enable", },
 		[0x6b] = { "Channel 1 and 2 Clock Mode Selection", },
@@ -226,7 +226,7 @@ struct io_reg crtc_regs = {
 		[0x8e] = { "LCD Power Sequence Control 3", },
 		[0x8f] = { "LCD Power Sequence Control 4", },
 		[0x90] = { "LCD Power Sequence Control 5", },
-		[0x91] = { "Software Cotnrol Power Sequence", },
+		[0x91] = { "Software Control Power Sequence", },
 		[0x92] = { "Read Threshold 2", },
 		[0x94] = { "Expire Number and Display Queue Extend", },
 		[0x95] = { "Extend Threshold Bit", },
commit 1b65992b08fc05866a2b8703e2198b80a1707094
Author: Bartosz Kosiorek <gang65 at poczta.onet.pl>
Date:   Mon Dec 3 00:13:54 2012 +0100

    Fix Xv bandwidth check when no vertical refresh is available

diff --git a/src/via_display.c b/src/via_display.c
index 80c5d26..97473f0 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -957,8 +957,6 @@ iga1_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
     ScrnInfoPtr pScrn = crtc->scrn;
     VIAPtr pVia = VIAPTR(pScrn);
 
-    pVia->OverlaySupported = FALSE;
-
     if (!pVia->pVbe) {
         if (!vgaHWInit(pScrn, adjusted_mode))
             return;
@@ -1357,8 +1355,6 @@ iga2_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode,
     ScrnInfoPtr pScrn = crtc->scrn;
     VIAPtr pVia = VIAPTR(pScrn);
 
-    pVia->OverlaySupported = FALSE;
-
     if (pVia->pVbe) {
         if (!ViaVbeSetMode(pScrn, adjusted_mode))
             return;
diff --git a/src/via_driver.h b/src/via_driver.h
index 65b7a46..80f13fb 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -363,7 +363,6 @@ typedef struct _VIA {
     CARD32              VideoStatus;
     VIAHWDiff           HWDiff;
     unsigned long       dwV1, dwV3;
-    unsigned long       OverlaySupported;
     unsigned long       dwFrameNum;
 
     CARD32*             VidRegBuffer; /* Temporary buffer for video overlay registers. */
diff --git a/src/via_vbe.c b/src/via_vbe.c
index d2e19d0..776ed2f 100644
--- a/src/via_vbe.c
+++ b/src/via_vbe.c
@@ -193,8 +193,6 @@ ViaVbeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode)
     int mode;
     int refreshRate;
 
-    pVia->OverlaySupported = FALSE;
-
     data = (VbeModeInfoData *) pMode->Private;
 
     mode = data->mode | (1 << 15);
diff --git a/src/via_xv.c b/src/via_xv.c
index 36b9741..7ad6df7 100644
--- a/src/via_xv.c
+++ b/src/via_xv.c
@@ -357,8 +357,7 @@ DecideOverlaySupport(xf86CrtcPtr crtc)
                 memEfficiency = (float)SINGLE_3205_133;
                 break;
             default:
-                /*Unknow DRAM Type */
-                DBG_DD(ErrorF("Unknow DRAM Type!\n"));
+                ErrorF("Unknow DRAM Type!\n");
                 mClock = 166;
                 memEfficiency = (float)SINGLE_3205_133;
                 break;
@@ -368,6 +367,11 @@ DecideOverlaySupport(xf86CrtcPtr crtc)
         height = mode->VDisplay;
         refresh = mode->VRefresh;
 
+        if (refresh==0) {
+            refresh=60;
+            ErrorF("Unable to fetch vertical refresh value, needed for bandwidth calculation.\n");
+        }
+
         /*
          * Approximative, VERY conservative formula in some cases.
          * This formula and the one below are derived analyzing the
@@ -388,10 +392,10 @@ DecideOverlaySupport(xf86CrtcPtr crtc)
             DBG_DD(ErrorF(" via_xv.c : mClk= %f : \n", mClock));
             DBG_DD(ErrorF(" via_xv.c : memEfficiency= %f : \n",
                 memEfficiency));
-            DBG_DD(ErrorF(" via_xv.c : needBandwidth= %f : \n",
-                needBandWidth));
-            DBG_DD(ErrorF(" via_xv.c : totalBandwidth= %f : \n",
-                totalBandWidth));
+            ErrorF(" via_xv.c : needBandwidth= %f : \n",
+                needBandWidth);
+            ErrorF(" via_xv.c : totalBandwidth= %f : \n",
+                totalBandWidth);
             if (needBandWidth < totalBandWidth)
                 return TRUE;
         }
@@ -1274,8 +1278,7 @@ viaPutImage(ScrnInfoPtr pScrn,
             }
 
             /* If there is bandwidth issue, block the H/W overlay */
-            if (!pVia->OverlaySupported &&
-                    !(pVia->OverlaySupported = DecideOverlaySupport(crtc))) {
+            if (!(DecideOverlaySupport(crtc))) {
                 DBG_DD(ErrorF
                         (" via_xv.c : Xv Overlay rejected due to insufficient "
                                 "memory bandwidth.\n"));