[Openchrome-devel] drm-openchrome: drivers/gpu/drm
James Simmons
jsimmons at kemper.freedesktop.org
Wed Feb 27 14:48:53 PST 2013
drivers/gpu/drm/via/via_dma.h | 29 -
drivers/gpu/drm/via/via_drv.c | 4
drivers/gpu/drm/via/via_drv.h | 3
drivers/gpu/drm/via/via_h1_dma.c | 690 ++++-----------------------------------
drivers/gpu/drm/via/via_ioc32.c | 10
drivers/gpu/drm/via/via_irq.c | 9
drivers/gpu/drm/via/via_ttm.c | 74 +++-
drivers/gpu/drm/via/via_video.c | 4
8 files changed, 174 insertions(+), 649 deletions(-)
New commits:
commit d3a112941fecf610711d67e9d2d412ce258f546e
Author: James Simmons <jsimmons at infradead.org>
Date: Wed Feb 27 17:48:02 2013 -0500
Accelerate buffer object domain changes (DMA blitting)
diff --git a/drivers/gpu/drm/via/via_dma.h b/drivers/gpu/drm/via/via_dma.h
index cdfff36..b002475 100644
--- a/drivers/gpu/drm/via/via_dma.h
+++ b/drivers/gpu/drm/via/via_dma.h
@@ -57,15 +57,13 @@ struct via_h1_header {
};
struct drm_via_sg_info {
- struct page **pages;
- unsigned long num_pages;
- struct via_h1_header **desc_pages;
+ struct ttm_tt *ttm;
+ unsigned long **desc_pages;
int num_desc_pages;
int num_desc;
enum dma_data_direction direction;
- unsigned char *bounce_buffer;
+ unsigned long dev_start;
dma_addr_t chain_start;
- uint32_t free_on_sequence;
unsigned int descriptors_per_page;
int aborted;
enum {
@@ -77,27 +75,6 @@ struct drm_via_sg_info {
} state;
};
-typedef struct _drm_via_blitq {
- struct drm_device *dev;
- uint32_t cur_blit_handle;
- uint32_t done_blit_handle;
- unsigned serviced;
- unsigned head;
- unsigned cur;
- unsigned num_free;
- unsigned num_outstanding;
- unsigned long end;
- int aborting;
- int is_active;
- struct drm_via_sg_info *blits[VIA_NUM_BLIT_SLOTS];
- spinlock_t blit_lock;
- wait_queue_head_t blit_queue[VIA_NUM_BLIT_SLOTS];
- wait_queue_head_t busy_queue;
- struct work_struct wq;
- struct timer_list poll_timer;
-} drm_via_blitq_t;
-
-
/*
* PCI DMA Registers
* Channels 2 & 3 don't seem to be implemented in hardware.
diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index d5e95e0..e6d1e28 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -372,6 +372,10 @@ via_driver_load(struct drm_device *dev, unsigned long chipset)
if (ret)
goto out_err;
+ ret = via_dmablit_init(dev);
+ if (ret)
+ goto out_err;
+
if (drm_core_check_feature(dev, DRIVER_MODESET))
ret = via_modeset_init(dev);
out_err:
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index f700ac0..8b21218 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -138,7 +138,6 @@ struct drm_via_private {
struct via_fence_pool dma_fences;
int desc_size;
- drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
struct via_crtc iga[2];
@@ -191,8 +190,6 @@ extern int via_cmdbuf_size(struct drm_device *dev, void *data, struct drm_file *
extern int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int via_wait_irq(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv);
-extern int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv);
extern int via_wait_idle(struct drm_via_private *dev_priv);
extern int via_detect_vram(struct drm_device *dev);
diff --git a/drivers/gpu/drm/via/via_h1_dma.c b/drivers/gpu/drm/via/via_h1_dma.c
index 9befd8a..d2e8521 100644
--- a/drivers/gpu/drm/via/via_h1_dma.c
+++ b/drivers/gpu/drm/via/via_h1_dma.c
@@ -29,10 +29,6 @@
#include "via_drv.h"
#include "via_dma.h"
-#define VIA_PGDN(x) (((unsigned long)(x)) & PAGE_MASK)
-#define VIA_PGOFF(x) (((unsigned long)(x)) & ~PAGE_MASK)
-#define VIA_PFN(x) ((unsigned long)(x) >> PAGE_SHIFT)
-
/*
* Fire a blit engine.
*/
@@ -69,148 +65,92 @@ via_dmablit_engine_off(struct drm_device *dev, int engine)
VIA_WRITE(VIA_PCI_DMA_CSR0 + engine * 0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
}
+static void
+via_dmablit_done(struct drm_device *dev, int engine)
+{
+ struct drm_via_private *dev_priv = dev->dev_private;
+
+ /* Clear transfer done flag. */
+ VIA_WRITE(VIA_PCI_DMA_CSR0 + engine * 0x04, VIA_DMA_CSR_TD);
+}
+
/*
* Unmap a DMA mapping.
*/
static void
-via_unmap_from_device(struct device *dev, struct drm_via_sg_info *vsg)
+via_unmap_from_device(struct drm_device *dev, struct drm_via_sg_info *vsg)
{
+ struct drm_via_private *dev_priv = dev->dev_private;
int num_desc = vsg->num_desc;
unsigned cur_descriptor_page = num_desc / vsg->descriptors_per_page;
unsigned descriptor_this_page = num_desc % vsg->descriptors_per_page;
- struct via_h1_header *desc_ptr = vsg->desc_pages[cur_descriptor_page] +
- descriptor_this_page;
dma_addr_t next = vsg->chain_start;
+ struct via_h1_header *desc_ptr;
+ desc_ptr = (struct via_h1_header *) vsg->desc_pages[cur_descriptor_page] +
+ descriptor_this_page;
while (num_desc--) {
if (descriptor_this_page-- == 0) {
cur_descriptor_page--;
descriptor_this_page = vsg->descriptors_per_page - 1;
- desc_ptr = vsg->desc_pages[cur_descriptor_page] +
- descriptor_this_page;
+ desc_ptr = (struct via_h1_header *) vsg->desc_pages[cur_descriptor_page] +
+ descriptor_this_page;
}
- dma_unmap_single(dev, next, sizeof(*desc_ptr), DMA_TO_DEVICE);
- dma_unmap_page(dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
+ dma_unmap_single(dev->dev, next, dev_priv->desc_size, DMA_TO_DEVICE);
+ dma_unmap_page(dev->dev, desc_ptr->mem_addr, desc_ptr->size, vsg->direction);
next = (dma_addr_t) desc_ptr->next;
desc_ptr--;
}
}
/*
- * Count how many descriptors are needed.
- */
-static void
-via_count_descriptors(const drm_via_dmablit_t *xfer, struct drm_via_sg_info *vsg)
-{
- unsigned char *mem_addr = xfer->mem_addr, *cur_mem;
- uint32_t fb_addr = xfer->fb_addr, cur_fb;
- int num_desc = 0, cur_line;
- unsigned long line_len;
- unsigned remaining_len;
-
- for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
- line_len = xfer->line_length;
- cur_fb = fb_addr;
- cur_mem = mem_addr;
-
- while (line_len > 0) {
- remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
- line_len -= remaining_len;
-
- num_desc++;
- cur_mem += remaining_len;
- cur_fb += remaining_len;
- }
-
- mem_addr += xfer->mem_stride;
- fb_addr += xfer->fb_stride;
- }
- vsg->num_desc = num_desc;
-}
-
-/*
* Map the DMA pages for the device, put together and map also the descriptors. Descriptors
* are run in reverse order by the hardware because we are not allowed to update the
* 'next' field without syncing calls when the descriptor is already mapped.
*/
-static void
-via_map_for_device(struct device *dev, const drm_via_dmablit_t *xfer,
- struct drm_via_sg_info *vsg)
-{
- unsigned num_descriptors_this_page = 0, cur_descriptor_page = 0;
- unsigned char *mem_addr = xfer->mem_addr, *cur_mem;
- unsigned char *first_addr = (unsigned char *)VIA_PGDN(mem_addr);
- uint32_t fb_addr = xfer->fb_addr, cur_fb;
- unsigned long line_len;
- unsigned remaining_len;
- int num_desc = 0;
- int cur_line;
- dma_addr_t next = 0 | VIA_DMA_DPR_EC;
- struct via_h1_header *desc_ptr = vsg->desc_pages[cur_descriptor_page];
-
- for (cur_line = 0; cur_line < xfer->num_lines; ++cur_line) {
- line_len = xfer->line_length;
- cur_fb = fb_addr;
- cur_mem = mem_addr;
-
- while (line_len > 0) {
- remaining_len = min(PAGE_SIZE-VIA_PGOFF(cur_mem), line_len);
- line_len -= remaining_len;
-
- desc_ptr->mem_addr = dma_map_page(dev,
- vsg->pages[VIA_PFN(cur_mem) - VIA_PFN(first_addr)],
- VIA_PGOFF(cur_mem), remaining_len,
- vsg->direction);
- desc_ptr->dev_addr = cur_fb;
- desc_ptr->size = remaining_len;
- desc_ptr->next = (uint32_t) next;
- next = dma_map_single(dev, desc_ptr, sizeof(*desc_ptr), DMA_TO_DEVICE);
- desc_ptr++;
- if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
- num_descriptors_this_page = 0;
- desc_ptr = vsg->desc_pages[++cur_descriptor_page];
- }
-
- cur_mem += remaining_len;
- cur_fb += remaining_len;
- num_desc++;
+static int
+via_map_for_device(struct via_fence_engine *eng, struct drm_via_sg_info *vsg,
+ unsigned long offset)
+{
+ unsigned int num_descriptors_this_page = 0, cur_descriptor_page = 0;
+ unsigned long dev_start = eng->pool->fence_sync.bo->offset;
+ struct device *dev = eng->pool->dev->dev;
+ dma_addr_t next = VIA_DMA_DPR_EC;
+ struct via_h1_header *desc_ptr;
+ struct ttm_tt *ttm = vsg->ttm;
+ int num_desc = 0, ret = 0;
+
+ desc_ptr = (struct via_h1_header *) vsg->desc_pages[cur_descriptor_page];
+ dev_start = vsg->dev_start;
+
+ for (num_desc = 0; num_desc < ttm->num_pages; num_desc++) {
+ /* Map system pages */
+ if (!ttm->pages[num_desc]) {
+ ret = -ENOMEM;
+ goto out;
}
-
- mem_addr += xfer->mem_stride;
- fb_addr += xfer->fb_stride;
+ desc_ptr->mem_addr = dma_map_page(dev, ttm->pages[num_desc], 0,
+ PAGE_SIZE, vsg->direction);
+ desc_ptr->dev_addr = dev_start;
+ /* size count in 16 bytes */
+ desc_ptr->size = PAGE_SIZE / 16;
+ desc_ptr->next = (uint32_t) next;
+
+ /* Map decriptors for Chaining mode */
+ next = dma_map_single(dev, desc_ptr, sizeof(*desc_ptr), DMA_TO_DEVICE);
+ desc_ptr++;
+ if (++num_descriptors_this_page >= vsg->descriptors_per_page) {
+ num_descriptors_this_page = 0;
+ desc_ptr = (struct via_h1_header *) vsg->desc_pages[++cur_descriptor_page];
+ }
+ dev_start += PAGE_SIZE;
}
vsg->chain_start = next;
vsg->state = dr_via_device_mapped;
- vsg->num_desc = num_desc;
-}
-
-/*
- * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps track of the
- * pages we allocate. We don't want to use kmalloc for the descriptor chain because it may be
- * quite large for some blits, and pages don't need to be contingous.
- */
-static int
-via_alloc_desc_pages(struct drm_via_sg_info *vsg)
-{
- int i;
-
- vsg->descriptors_per_page = PAGE_SIZE / sizeof(struct via_h1_header);
- vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
- vsg->descriptors_per_page;
-
- if (NULL == (vsg->desc_pages = kcalloc(vsg->num_desc_pages, sizeof(void *), GFP_KERNEL)))
- return -ENOMEM;
-
- vsg->state = dr_via_desc_pages_alloc;
- for (i = 0; i < vsg->num_desc_pages; ++i) {
- if (NULL == (vsg->desc_pages[i] = (struct via_h1_header *) __get_free_page(GFP_KERNEL)))
- return -ENOMEM;
- }
- DRM_DEBUG("Allocated %d pages for %d descriptors.\n", vsg->num_desc_pages,
- vsg->num_desc);
- return 0;
+out:
+ return ret;
}
/*
@@ -219,9 +159,10 @@ via_alloc_desc_pages(struct drm_via_sg_info *vsg)
* with the actual status of the used resources.
*/
static void
-via_free_sg_info(struct device *dev, struct drm_via_sg_info *vsg)
+via_free_sg_info(struct via_fence *fence)
{
- struct page *page;
+ struct drm_device *dev = fence->pool->dev;
+ struct drm_via_sg_info *vsg = fence->priv;
int i;
switch (vsg->state) {
@@ -229,525 +170,58 @@ via_free_sg_info(struct device *dev, struct drm_via_sg_info *vsg)
via_unmap_from_device(dev, vsg);
case dr_via_desc_pages_alloc:
for (i = 0; i < vsg->num_desc_pages; ++i) {
- if (vsg->desc_pages[i] != NULL)
+ if (vsg->desc_pages[i])
free_page((unsigned long)vsg->desc_pages[i]);
}
kfree(vsg->desc_pages);
- case dr_via_pages_locked:
- for (i = 0; i < vsg->num_pages; ++i) {
- if (NULL != (page = vsg->pages[i])) {
- if (!PageReserved(page) && (DMA_FROM_DEVICE == vsg->direction))
- SetPageDirty(page);
- page_cache_release(page);
- }
- }
- case dr_via_pages_alloc:
- vfree(vsg->pages);
default:
vsg->state = dr_via_sg_init;
}
- vfree(vsg->bounce_buffer);
- vsg->bounce_buffer = NULL;
- vsg->free_on_sequence = 0;
}
-/*
- * Obtain a page pointer array and lock all pages into system memory. A segmentation violation will
- * occur here if the calling user does not have access to the submitted address.
- */
-static int
-via_lock_all_dma_pages(struct drm_device *dev, struct drm_via_sg_info *ttm, drm_via_dmablit_t *xfer)
-{
- unsigned long first_pfn = VIA_PFN(xfer->mem_addr);
- int write = xfer->to_fb, ret;
- unsigned long start;
-
- ttm->direction = (write) ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
- ttm->bounce_buffer = NULL;
- ttm->state = dr_via_sg_init;
- ttm->num_pages = VIA_PFN(xfer->mem_addr + (xfer->num_lines * xfer->mem_stride - 1)) -
- first_pfn + 1;
- ttm->pages = vzalloc(sizeof(struct page *) * ttm->num_pages);
- if (NULL == ttm->pages)
- return -ENOMEM;
-
- start = (unsigned long)xfer->mem_addr;
-
- down_read(¤t->mm->mmap_sem);
- ret = get_user_pages(current, current->mm, start, ttm->num_pages,
- (ttm->direction == DMA_FROM_DEVICE),
- 0, ttm->pages, NULL);
-
- up_read(¤t->mm->mmap_sem);
- if (ret != ttm->num_pages) {
- if (ret < 0)
- return ret;
- ttm->state = dr_via_pages_locked;
- return -EINVAL;
- }
- ttm->state = dr_via_pages_locked;
- DRM_DEBUG("DMA pages locked\n");
- return 0;
-}
-
-/*
- * The dmablit part of the IRQ handler. Trying to do only reasonably fast things here.
- * The rest, like unmapping and freeing memory for done blits is done in a separate workqueue
- * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
- * the workqueue task takes care of processing associated with the old blit.
- */
-void
-via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
-{
- struct drm_via_private *dev_priv = dev->dev_private;
- drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
- int done_transfer, cur;
- unsigned long irqsave = 0;
- uint32_t status = 0;
-
- DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
- engine, from_irq, (unsigned long) blitq);
-
- if (from_irq)
- spin_lock(&blitq->blit_lock);
- else
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- done_transfer = blitq->is_active &&
- ((status = VIA_READ(VIA_PCI_DMA_CSR0 + engine * 0x04)) & VIA_DMA_CSR_TD);
- done_transfer = done_transfer || (blitq->aborting && !(status & VIA_DMA_CSR_DE));
-
- cur = blitq->cur;
- if (done_transfer) {
-
- blitq->blits[cur]->aborted = blitq->aborting;
- blitq->done_blit_handle++;
- DRM_WAKEUP(blitq->blit_queue + cur);
-
- cur++;
- if (cur >= VIA_NUM_BLIT_SLOTS)
- cur = 0;
- blitq->cur = cur;
-
- /*
- * Clear transfer done flag.
- */
-
- VIA_WRITE(VIA_PCI_DMA_CSR0 + engine * 0x04, VIA_DMA_CSR_TD);
-
- blitq->is_active = 0;
- blitq->aborting = 0;
- schedule_work(&blitq->wq);
-
- } else if (blitq->is_active && time_after_eq(jiffies, blitq->end)) {
- /*
- * Abort transfer after one second.
- */
- via_abort_dmablit(dev, engine);
- blitq->aborting = 1;
- blitq->end = jiffies + DRM_HZ;
- }
-
- if (!blitq->is_active) {
- if (blitq->num_outstanding) {
- via_h1_fire_dmablit(dev, blitq->blits[cur], engine);
- blitq->is_active = 1;
- blitq->cur = cur;
- blitq->num_outstanding--;
- blitq->end = jiffies + DRM_HZ;
- if (!timer_pending(&blitq->poll_timer))
- mod_timer(&blitq->poll_timer, jiffies + 1);
- } else {
- if (timer_pending(&blitq->poll_timer))
- del_timer(&blitq->poll_timer);
- via_dmablit_engine_off(dev, engine);
- }
- }
-
- if (from_irq)
- spin_unlock(&blitq->blit_lock);
- else
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-}
-
-/*
- * Check whether this blit is still active, performing necessary locking.
- */
-static int
-via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
+static void
+via_h1_dma_fence_signaled(struct via_fence_engine *eng)
{
- unsigned long irqsave;
- uint32_t slot;
- int active;
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- /*
- * Allow for handle wraparounds.
- */
- active = ((blitq->done_blit_handle - handle) > (1 << 23)) &&
- ((blitq->cur_blit_handle - handle) <= (1 << 23));
-
- if (queue && active) {
- slot = handle - blitq->done_blit_handle + blitq->cur - 1;
- if (slot >= VIA_NUM_BLIT_SLOTS)
- slot -= VIA_NUM_BLIT_SLOTS;
- *queue = blitq->blit_queue + slot;
- }
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- return active;
+ via_dmablit_done(eng->pool->dev, eng->index);
}
/*
- * Sync. Wait for at least three seconds for the blit to be performed.
+ * Build all info and do all mappings required for a blit.
*/
static int
-via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
+via_h1_dma_emit(struct via_fence *fence)
{
- struct drm_via_private *dev_priv = dev->dev_private;
- drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
- wait_queue_head_t *queue;
+ struct via_fence_engine *eng = fence->pool->engines[fence->engine];
+ unsigned long offset = VIA_FENCE_SIZE * eng->index;
+ struct drm_via_sg_info *vsg = fence->priv;
int ret = 0;
- if (via_dmablit_active(blitq, engine, handle, &queue)) {
- DRM_WAIT_ON(ret, *queue, 3 * DRM_HZ,
- !via_dmablit_active(blitq, engine, handle, NULL));
+ ret = via_map_for_device(eng, vsg, offset);
+ if (!ret) {
+ writel(fence->seq.key, eng->read_seq);
+ via_h1_fire_dmablit(fence->pool->dev, vsg, fence->engine);
}
- DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
- handle, engine, ret);
-
return ret;
}
/*
- * A timer that regularly polls the blit engine in cases where we don't have interrupts:
- * a) Broken hardware (typically those that don't have any video capture facility).
- * b) Blit abort. The hardware doesn't send an interrupt when a blit is aborted.
- * The timer and hardware IRQ's can and do work in parallel. If the hardware has
- * irqs, it will shorten the latency somewhat.
- */
-static void
-via_dmablit_timer(unsigned long data)
-{
- drm_via_blitq_t *blitq = (drm_via_blitq_t *) data;
- struct drm_device *dev = blitq->dev;
- int engine = (int)
- (blitq - ((struct drm_via_private *)dev->dev_private)->blit_queues);
-
- DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
- (unsigned long) jiffies);
-
- via_dmablit_handler(dev, engine, 0);
-
- if (!timer_pending(&blitq->poll_timer)) {
- mod_timer(&blitq->poll_timer, jiffies + 1);
-
- /*
- * Rerun handler to delete timer if engines are off, and
- * to shorten abort latency. This is a little nasty.
- */
- via_dmablit_handler(dev, engine, 0);
- }
-}
-
-/*
- * Workqueue task that frees data and mappings associated with a blit.
- * Also wakes up waiting processes. Each of these tasks handles one
- * blit engine only and may not be called on each interrupt.
- */
-static void
-via_dmablit_workqueue(struct work_struct *work)
-{
- drm_via_blitq_t *blitq = container_of(work, drm_via_blitq_t, wq);
- struct drm_device *dev = blitq->dev;
- struct drm_via_sg_info *cur_sg;
- unsigned long irqsave;
- int cur_released;
-
- DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
- (blitq - ((struct drm_via_private *)dev->dev_private)->blit_queues));
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
-
- while (blitq->serviced != blitq->cur) {
-
- cur_released = blitq->serviced++;
-
- DRM_DEBUG("Releasing blit slot %d\n", cur_released);
-
- if (blitq->serviced >= VIA_NUM_BLIT_SLOTS)
- blitq->serviced = 0;
-
- cur_sg = blitq->blits[cur_released];
- blitq->num_free++;
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- DRM_WAKEUP(&blitq->busy_queue);
-
- via_free_sg_info(dev->dev, cur_sg);
- kfree(cur_sg);
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- }
-
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-}
-
-/*
* Init all blit engines. Currently we use two, but some hardware have 4.
*/
-void
-via_init_dmablit(struct drm_device *dev)
+int
+via_dmablit_init(struct drm_device *dev)
{
struct drm_via_private *dev_priv = dev->dev_private;
- drm_via_blitq_t *blitq;
- int i, j;
+ struct via_fence_pool *pool = &dev_priv->dma_fences;
+ int ret;
pci_set_master(dev->pdev);
- for (i = 0; i < VIA_NUM_BLIT_ENGINES; ++i) {
- blitq = dev_priv->blit_queues + i;
- blitq->dev = dev;
- blitq->cur_blit_handle = 0;
- blitq->done_blit_handle = 0;
- blitq->head = 0;
- blitq->cur = 0;
- blitq->serviced = 0;
- blitq->num_free = VIA_NUM_BLIT_SLOTS - 1;
- blitq->num_outstanding = 0;
- blitq->is_active = 0;
- blitq->aborting = 0;
- spin_lock_init(&blitq->blit_lock);
- for (j = 0; j < VIA_NUM_BLIT_SLOTS; ++j)
- DRM_INIT_WAITQUEUE(blitq->blit_queue + j);
- DRM_INIT_WAITQUEUE(&blitq->busy_queue);
- INIT_WORK(&blitq->wq, via_dmablit_workqueue);
- setup_timer(&blitq->poll_timer, via_dmablit_timer,
- (unsigned long)blitq);
- }
-}
-
-/*
- * Build all info and do all mappings required for a blit.
- */
-static int
-via_build_sg_info(struct drm_device *dev, struct drm_via_sg_info *vsg, drm_via_dmablit_t *xfer)
-{
- int ret = 0;
-
- if (xfer->num_lines <= 0 || xfer->line_length <= 0) {
- DRM_ERROR("Zero size bitblt.\n");
- return -EINVAL;
- }
-
- /*
- * Below check is a driver limitation, not a hardware one. We
- * don't want to lock unused pages, and don't want to incoporate the
- * extra logic of avoiding them. Make sure there are no.
- * (Not a big limitation anyway.)
- */
-
- if ((xfer->mem_stride - xfer->line_length) > 2*PAGE_SIZE) {
- DRM_ERROR("Too large system memory stride. Stride: %d, "
- "Length: %d\n", xfer->mem_stride, xfer->line_length);
- return -EINVAL;
- }
-
- if ((xfer->mem_stride == xfer->line_length) &&
- (xfer->fb_stride == xfer->line_length)) {
- xfer->mem_stride *= xfer->num_lines;
- xfer->line_length = xfer->mem_stride;
- xfer->fb_stride = xfer->mem_stride;
- xfer->num_lines = 1;
- }
-
- /*
- * Don't lock an arbitrary large number of pages, since that causes a
- * DOS security hole.
- */
-
- if (xfer->num_lines > 2048 || (xfer->num_lines*xfer->mem_stride > (2048*2048*4))) {
- DRM_ERROR("Too large PCI DMA bitblt.\n");
- return -EINVAL;
- }
-
- /*
- * we allow a negative fb stride to allow flipping of images in
- * transfer.
- */
-
- if (xfer->mem_stride < xfer->line_length ||
- abs(xfer->fb_stride) < xfer->line_length) {
- DRM_ERROR("Invalid frame-buffer / memory stride.\n");
- return -EINVAL;
- }
-
- /*
- * A hardware bug seems to be worked around if system memory addresses start on
- * 16 byte boundaries. This seems a bit restrictive however. VIA is contacted
- * about this. Meanwhile, impose the following restrictions:
- */
-
-#ifdef VIA_BUGFREE
- if ((((unsigned long)xfer->mem_addr & 3) != ((unsigned long)xfer->fb_addr & 3)) ||
- ((xfer->num_lines > 1) && ((xfer->mem_stride & 3) != (xfer->fb_stride & 3)))) {
- DRM_ERROR("Invalid DRM bitblt alignment.\n");
- return -EINVAL;
- }
-#else
- if ((((unsigned long)xfer->mem_addr & 15) ||
- ((unsigned long)xfer->fb_addr & 3)) ||
- ((xfer->num_lines > 1) &&
- ((xfer->mem_stride & 15) || (xfer->fb_stride & 3)))) {
- DRM_ERROR("Invalid DRM bitblt alignment.\n");
- return -EINVAL;
- }
-#endif
-
- if (0 != (ret = via_lock_all_dma_pages(dev, vsg, xfer))) {
- DRM_ERROR("Could not lock DMA pages.\n");
- via_free_sg_info(dev->dev, vsg);
- return ret;
- }
-
- via_count_descriptors(xfer, vsg);
- if (0 != (ret = via_alloc_desc_pages(vsg))) {
- DRM_ERROR("Could not allocate DMA descriptor pages.\n");
- via_free_sg_info(dev->dev, vsg);
- return ret;
+ ret = via_fence_pool_init(pool, "viadrm_dma", 4, TTM_PL_FLAG_VRAM, dev);
+ if (!ret) {
+ pool->fence_signaled = via_h1_dma_fence_signaled;
+ pool->fence_cleanup = via_free_sg_info;
+ pool->fence_emit = via_h1_dma_emit;
}
-
- via_map_for_device(dev->dev, xfer, vsg);
- return 0;
-}
-
-/*
- * Reserve one free slot in the blit queue. Will wait for one second for one
- * to become available. Otherwise -EBUSY is returned.
- */
-static int
-via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
-{
- int ret = 0;
- unsigned long irqsave;
-
- DRM_DEBUG("Num free is %d\n", blitq->num_free);
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- while (blitq->num_free == 0) {
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- DRM_WAIT_ON(ret, blitq->busy_queue, DRM_HZ, blitq->num_free > 0);
- if (ret)
- return (-EINTR == ret) ? -EAGAIN : ret;
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- }
-
- blitq->num_free--;
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- return 0;
-}
-
-/*
- * Hand back a free slot if we changed our mind.
- */
-static void
-via_dmablit_release_slot(drm_via_blitq_t *blitq)
-{
- unsigned long irqsave;
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- blitq->num_free++;
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
- DRM_WAKEUP(&blitq->busy_queue);
-}
-
-/*
- * Grab a free slot. Build blit info and queue a blit.
- */
-static int
-via_dmablit(struct drm_device *dev, drm_via_dmablit_t *xfer)
-{
- struct drm_via_private *dev_priv = dev->dev_private;
- struct drm_via_sg_info *vsg;
- drm_via_blitq_t *blitq;
- unsigned long irqsave;
- int engine, ret;
-
- if (dev_priv == NULL) {
- DRM_ERROR("Called without initialization.\n");
- return -EINVAL;
- }
-
- engine = (xfer->to_fb) ? 0 : 1;
- blitq = dev_priv->blit_queues + engine;
- if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
- return ret;
-
- if (NULL == (vsg = kmalloc(sizeof(*vsg), GFP_KERNEL))) {
- via_dmablit_release_slot(blitq);
- return -ENOMEM;
- }
- if (0 != (ret = via_build_sg_info(dev, vsg, xfer))) {
- via_dmablit_release_slot(blitq);
- kfree(vsg);
- return ret;
- }
-
- spin_lock_irqsave(&blitq->blit_lock, irqsave);
- blitq->blits[blitq->head++] = vsg;
- if (blitq->head >= VIA_NUM_BLIT_SLOTS)
- blitq->head = 0;
- blitq->num_outstanding++;
- xfer->sync.sync_handle = ++blitq->cur_blit_handle;
- spin_unlock_irqrestore(&blitq->blit_lock, irqsave);
-
- xfer->sync.engine = engine;
-
- via_dmablit_handler(dev, engine, 0);
-
- return 0;
-}
-
-/*
- * Sync on a previously submitted blit. Note that the X server use signals extensively, and
- * that there is a very big probability that this IOCTL will be interrupted by a signal. In that
- * case it returns with -EAGAIN for the signal to be delivered.
- * The caller should then reissue the IOCTL. This is similar to what is being done for drmGetLock().
- */
-int
-via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_blitsync_t *sync = data;
- int err;
-
- if (sync->engine >= VIA_NUM_BLIT_ENGINES)
- return -EINVAL;
-
- err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);
-
- if (-EINTR == err)
- err = -EAGAIN;
-
- return err;
-}
-
-/*
- * Queue a blit and hand back a handle to be used for sync. This IOCTL may be interrupted by a signal
- * while waiting for a free slot in the blit queue. In that case it returns with -EAGAIN and should
- * be reissued. See the above IOCTL code.
- */
-int
-via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
-{
- drm_via_dmablit_t *xfer = data;
- int err;
-
- err = via_dmablit(dev, xfer);
-
- return err;
+ dev_priv->desc_size = sizeof(struct via_h1_header);
+ return ret;
}
diff --git a/drivers/gpu/drm/via/via_ioc32.c b/drivers/gpu/drm/via/via_ioc32.c
index 9b933fb..8dc0fa6 100644
--- a/drivers/gpu/drm/via/via_ioc32.c
+++ b/drivers/gpu/drm/via/via_ioc32.c
@@ -110,6 +110,16 @@ static int via_map_init(struct drm_device *dev, void *data, struct drm_file *fil
return ret;
}
+static int via_dma_blit_sync(struct drm_device *dev, void *data, struct drm_file *file_priv)
+{
+ return -EINVAL;
+}
+
+static int via_dma_blit(struct drm_device *dev, void *data, struct drm_file *file_priv)
+{
+ return -EINVAL;
+}
+
static int via_mem_alloc(struct drm_device *dev, void *data,
struct drm_file *filp)
{
diff --git a/drivers/gpu/drm/via/via_irq.c b/drivers/gpu/drm/via/via_irq.c
index 089f89d..b0f8ea1 100644
--- a/drivers/gpu/drm/via/via_irq.c
+++ b/drivers/gpu/drm/via/via_irq.c
@@ -129,14 +129,19 @@ irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS)
for (i = 0; i < dev_priv->num_irqs; ++i) {
if (status & cur_irq->pending_mask) {
+ struct via_fence_engine *eng = NULL;
+
atomic_inc(&cur_irq->irq_received);
DRM_WAKEUP(&cur_irq->irq_queue);
ret = IRQ_HANDLED;
if (dev_priv->irq_map[drm_via_irq_dma0_td] == i)
- via_dmablit_handler(dev, 0, 1);
+ eng = dev_priv->dma_fences.engines[0];
else if (dev_priv->irq_map[drm_via_irq_dma1_td] == i)
- via_dmablit_handler(dev, 1, 1);
+ eng = dev_priv->dma_fences.engines[1];
+
+ if (eng)
+ queue_work(eng->pool->fence_wq, &eng->fence_work);
}
cur_irq++;
}
diff --git a/drivers/gpu/drm/via/via_ttm.c b/drivers/gpu/drm/via/via_ttm.c
index 0c19bfc..17a4610 100644
--- a/drivers/gpu/drm/via/via_ttm.c
+++ b/drivers/gpu/drm/via/via_ttm.c
@@ -212,21 +212,81 @@ via_evict_flags(struct ttm_buffer_object *bo, struct ttm_placement *placement)
}
}
+/*
+ * Allocate DMA capable memory for the blit descriptor chain, and an array that keeps
+ * track of the pages we allocate. We don't want to use kmalloc for the descriptor
+ * chain because it may be quite large for some blits, and pages don't need to be
+ * contingous.
+ */
+struct drm_via_sg_info *
+via_alloc_desc_pages(struct ttm_tt *ttm, struct drm_device *dev,
+ unsigned long dev_start, enum dma_data_direction direction)
+{
+ struct drm_via_sg_info *vsg = kzalloc(sizeof(*vsg), GFP_KERNEL);
+ struct drm_via_private *dev_priv = dev->dev_private;
+ int desc_size = dev_priv->desc_size, i;
+
+ vsg->ttm = ttm;
+ vsg->dev_start = dev_start;
+ vsg->direction = direction;
+ vsg->num_desc = ttm->num_pages; // + 1;
+ vsg->descriptors_per_page = PAGE_SIZE / desc_size;
+ vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
+ vsg->descriptors_per_page;
+
+ vsg->desc_pages = kzalloc(vsg->num_desc_pages * sizeof(void *), GFP_KERNEL);
+ if (!vsg->desc_pages)
+ return ERR_PTR(-ENOMEM);
+
+ vsg->state = dr_via_desc_pages_alloc;
+
+ /* Alloc pages for descriptor chain */
+ for (i = 0; i < vsg->num_desc_pages; ++i) {
+ vsg->desc_pages[i] = (unsigned long *) __get_free_page(GFP_KERNEL);
+
+ if (!vsg->desc_pages[i])
+ return ERR_PTR(-ENOMEM);
+ }
+ return vsg;
+}
+
/* Move between GART and VRAM */
static int
via_move_blit(struct ttm_buffer_object *bo, bool evict, bool no_wait_gpu,
struct ttm_mem_reg *new_mem, struct ttm_mem_reg *old_mem)
{
- unsigned long old_start, new_start;
- void *fence = NULL;
+ struct drm_via_private *dev_priv =
+ container_of(bo->bdev, struct drm_via_private, bdev);
+ enum dma_data_direction direction = DMA_TO_DEVICE;
+ unsigned long old_start, new_start, dev_addr = 0;
+ struct drm_via_sg_info *vsg;
+ int ret = -ENXIO;
+ struct via_fence *fence;
/* Real CPU physical address */
old_start = (old_mem->start << PAGE_SHIFT) + old_mem->bus.base;
new_start = (new_mem->start << PAGE_SHIFT) + new_mem->bus.base;
- //ret = via_copy(rdev, old_start, new_start, new_mem->num_pages, fence);
+ if (old_mem->mem_type == TTM_PL_VRAM) {
+ direction = DMA_FROM_DEVICE;
+ dev_addr = old_start;
+ } else if (new_mem->mem_type == TTM_PL_VRAM) {
+ /* direction is DMA_TO_DEVICE */
+ dev_addr = new_start;
+ }
+
+ /* device addr must be 16 byte align */
+ if (dev_addr & 0x0F)
+ return ret;
+
+ vsg = via_alloc_desc_pages(bo->ttm, dev_priv->dev, dev_addr, direction);
+ if (unlikely(IS_ERR(vsg)))
+ return PTR_ERR(vsg);
- return ttm_bo_move_accel_cleanup(bo, fence, evict, no_wait_gpu, new_mem);
+ fence = via_fence_create_and_emit(&dev_priv->dma_fences, vsg, 0);
+ if (unlikely(IS_ERR(fence)))
+ return PTR_ERR(fence);
+ return ttm_bo_move_accel_cleanup(bo, (void *)fence, evict, no_wait_gpu, new_mem);
}
static int
@@ -331,9 +391,11 @@ via_bo_move(struct ttm_buffer_object *bo, bool evict, bool interruptible,
}
/* Accelerated copy involving the VRAM. */
- if (new_mem->mem_type == TTM_PL_SYSTEM) {
+ if (old_mem->mem_type == TTM_PL_VRAM &&
+ new_mem->mem_type == TTM_PL_SYSTEM) {
ret = via_move_from_vram(bo, interruptible, no_wait_gpu, new_mem);
- } else if (old_mem->mem_type == TTM_PL_SYSTEM) {
+ } else if (old_mem->mem_type == TTM_PL_SYSTEM &&
+ new_mem->mem_type == TTM_PL_VRAM) {
ret = via_move_to_vram(bo, interruptible, no_wait_gpu, new_mem);
} else {
ret = via_move_blit(bo, evict, no_wait_gpu, new_mem, old_mem);
diff --git a/drivers/gpu/drm/via/via_video.c b/drivers/gpu/drm/via/via_video.c
index 997f1dd..8071ec9 100644
--- a/drivers/gpu/drm/via/via_video.c
+++ b/drivers/gpu/drm/via/via_video.c
@@ -30,8 +30,6 @@ void via_init_futex(struct drm_via_private *dev_priv)
{
unsigned int i;
- DRM_DEBUG("\n");
-
for (i = 0; i < VIA_NR_XVMC_LOCKS; ++i) {
DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i]));
XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0;
@@ -70,8 +68,6 @@ int via_decoder_futex(struct drm_device *dev, void *data, struct drm_file *file_
drm_via_sarea_t *sAPriv = dev_priv->sarea_priv;
int ret = 0;
- DRM_DEBUG("\n");
-
if (fx->lock >= VIA_NR_XVMC_LOCKS)
return -EFAULT;
More information about the Openchrome-devel
mailing list