[Openchrome-devel] drm-openchrome: drivers/gpu/drm
James Simmons
jsimmons at kemper.freedesktop.org
Sat Jun 29 06:42:59 PDT 2013
drivers/gpu/drm/via/init_ttm.c | 3
drivers/gpu/drm/via/via_3d_reg.h | 12 +--
drivers/gpu/drm/via/via_analog.c | 6 -
drivers/gpu/drm/via/via_crtc.c | 30 ++++----
drivers/gpu/drm/via/via_disp_reg.h | 54 +++++++--------
drivers/gpu/drm/via/via_display.c | 4 -
drivers/gpu/drm/via/via_display.h | 2
drivers/gpu/drm/via/via_dma.h | 8 +-
drivers/gpu/drm/via/via_drv.c | 2
drivers/gpu/drm/via/via_drv.h | 4 -
drivers/gpu/drm/via/via_fb.c | 13 +--
drivers/gpu/drm/via/via_fence.h | 2
drivers/gpu/drm/via/via_h1_cmdbuf.c | 21 ++---
drivers/gpu/drm/via/via_hdmi.c | 129 +++++++++++++++++-------------------
drivers/gpu/drm/via/via_i2c.c | 4 -
drivers/gpu/drm/via/via_pm.c | 3
drivers/gpu/drm/via/via_ttm.c | 2
drivers/gpu/drm/via/via_verifier.c | 30 ++++----
18 files changed, 164 insertions(+), 165 deletions(-)
New commits:
commit 736c19a2fc8eee5e10ada68c8704c6aee99d0561
Author: James Simmons <jsimmons at infradead.org>
Date: Sat Jun 29 09:25:15 2013 -0400
Code fixups to handle complaints from checkpatch.pl
diff --git a/drivers/gpu/drm/via/init_ttm.c b/drivers/gpu/drm/via/init_ttm.c
index ead32a1..aab0221 100644
--- a/drivers/gpu/drm/via/init_ttm.c
+++ b/drivers/gpu/drm/via/init_ttm.c
@@ -126,7 +126,8 @@ ttm_placement_from_domain(struct ttm_buffer_object *bo, struct ttm_placement *pl
struct ttm_heap *heap = container_of(bo, struct ttm_heap, pbo);
int cnt = 0, i = 0;
- if (!(domains & TTM_PL_MASK_MEM)) domains = TTM_PL_FLAG_SYSTEM;
+ if (!(domains & TTM_PL_MASK_MEM))
+ domains = TTM_PL_FLAG_SYSTEM;
do {
int domain = (domains & (1 << i));
diff --git a/drivers/gpu/drm/via/via_3d_reg.h b/drivers/gpu/drm/via/via_3d_reg.h
index e42705b..fc74647 100644
--- a/drivers/gpu/drm/via/via_3d_reg.h
+++ b/drivers/gpu/drm/via/via_3d_reg.h
@@ -237,8 +237,8 @@
/* Enable Setting
*/
#define HC_SubA_HEnable 0x0000
-#define HC_HenForce1P_MASK 0x00800000 //[Force 1 Pipe]
-#define HC_HenZDCheck_MASK 0x00400000 //[Z dirty bit settings]
+#define HC_HenForce1P_MASK 0x00800000 /* [Force 1 Pipe] */
+#define HC_HenZDCheck_MASK 0x00400000 /* [Z dirty bit settings] */
#define HC_HenTXEnvMap_MASK 0x00200000
#define HC_HenVertexCNT_MASK 0x00100000
#define HC_HenCPUDAZ_MASK 0x00080000
@@ -1011,11 +1011,11 @@
#define HC_HTXnFM_DX1 (HC_HTXnFM_DX | 0x00010000)
#define HC_HTXnFM_DX23 (HC_HTXnFM_DX | 0x00020000)
#define HC_HTXnFM_DX45 (HC_HTXnFM_DX | 0x00030000)
-//YUV package mode
+/* YUV package mode */
#define HC_HTXnFM_YUY2 (HC_HTXnFM_YUV | 0x00000000)
-//YUV planner mode
+/* YUV planner mode */
#define HC_HTXnFM_YV12 (HC_HTXnFM_YUV | 0x00040000)
-//YUV planner mode
+/* YUV planner mode */
#define HC_HTXnFM_IYUV (HC_HTXnFM_YUV | 0x00040000)
#define HC_HTXnFM_RGB555 (HC_HTXnFM_ARGB16 | 0x00000000)
#define HC_HTXnFM_RGB565 (HC_HTXnFM_ARGB16 | 0x00010000)
@@ -1046,7 +1046,7 @@
#define HC_HTXnLoc_Sys 0x00000002
#define HC_HTXnLoc_AGP 0x00000003
-// Video Texture
+/* Video Texture */
#define HC_HTXnYUV2RGBMode_RGB 0x00000000
#define HC_HTXnYUV2RGBMode_SDTV 0x00000001
#define HC_HTXnYUV2RGBMode_HDTV 0x00000002
diff --git a/drivers/gpu/drm/via/via_analog.c b/drivers/gpu/drm/via/via_analog.c
index 8fabeac..84e7b95 100644
--- a/drivers/gpu/drm/via/via_analog.c
+++ b/drivers/gpu/drm/via/via_analog.c
@@ -41,13 +41,13 @@ via_dac_dpms(struct drm_encoder *encoder, int mode)
switch (mode) {
case DRM_MODE_DPMS_SUSPEND:
- mask = BIT(5); // VSync off
+ mask = BIT(5); /* VSync off */
break;
case DRM_MODE_DPMS_STANDBY:
- mask = BIT(4); // HSync off
+ mask = BIT(4); /* HSync off */
break;
case DRM_MODE_DPMS_OFF:
- mask = (BIT(5) | BIT(4));// HSync and VSync off
+ mask = (BIT(5) | BIT(4));/* HSync and VSync off */
break;
case DRM_MODE_DPMS_ON:
default:
diff --git a/drivers/gpu/drm/via/via_crtc.c b/drivers/gpu/drm/via/via_crtc.c
index 10a5017..1c90e7c 100644
--- a/drivers/gpu/drm/via/via_crtc.c
+++ b/drivers/gpu/drm/via/via_crtc.c
@@ -270,7 +270,7 @@ via_iga2_gamma_set(struct drm_crtc *crtc, u16 *red, u16 *green, u16 *blue,
break;
default:
- reg_bits |= BIT(5);
+ reg_bits |= BIT(5);
break;
}
svga_wcrt_mask(VGABASE, 0x6A, reg_bits, reg_bits);
@@ -1413,7 +1413,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 96;
break;
- // CX700
+ /* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
iga->display_queue_expire_num = 128;
iga->fifo_high_threshold = 32;
@@ -1421,7 +1421,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 96;
break;
- // K8M890
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
iga->display_queue_expire_num = 124;
iga->fifo_high_threshold = 296;
@@ -1429,7 +1429,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 360;
break;
- // P4M890
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
iga->display_queue_expire_num = 32;
iga->fifo_high_threshold = 64;
@@ -1437,14 +1437,14 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 96;
break;
- // P4M900
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
iga->fifo_high_threshold = iga->fifo_threshold = 76;
iga->display_queue_expire_num = 32;
iga->fifo_max_depth = 96;
break;
- // VX800
+ /* VX800 */
case PCI_DEVICE_ID_VIA_VT1122:
iga->display_queue_expire_num = 128;
iga->fifo_high_threshold = 32;
@@ -1453,7 +1453,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->offset.count++;
break;
- // VX855
+ /* VX855 */
case PCI_DEVICE_ID_VIA_VX875:
iga->fifo_high_threshold = iga->fifo_threshold = 160;
iga->display_queue_expire_num = 320;
@@ -1461,7 +1461,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->offset.count++;
break;
- // VX900
+ /* VX900 */
case PCI_DEVICE_ID_VIA_VX900:
iga->fifo_high_threshold = iga->fifo_threshold = 160;
iga->display_queue_expire_num = 320;
@@ -1555,14 +1555,14 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 96;
break;
- // CX700
+ /* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
iga->fifo_high_threshold = iga->fifo_threshold = 128;
iga->display_queue_expire_num = 124;
iga->fifo_max_depth = 192;
break;
- // K8M890
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
iga->display_queue_expire_num = 124;
iga->fifo_high_threshold = 296;
@@ -1570,7 +1570,7 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 360;
break;
- // P4M890
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
iga->display_queue_expire_num = 32;
iga->fifo_high_threshold = 64;
@@ -1578,23 +1578,23 @@ via_crtc_init(struct drm_device *dev, int index)
iga->fifo_max_depth = 96;
break;
- // P4M900
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
iga->fifo_high_threshold = iga->fifo_threshold = 76;
iga->display_queue_expire_num = 32;
iga->fifo_max_depth = 96;
break;
- // VX800
+ /* VX800 */
case PCI_DEVICE_ID_VIA_VT1122:
iga->fifo_high_threshold = iga->fifo_threshold = 152;
iga->display_queue_expire_num = 64;
iga->fifo_max_depth = 192;
break;
- // VX855
+ /* VX855 */
case PCI_DEVICE_ID_VIA_VX875:
- // VX900
+ /* VX900 */
case PCI_DEVICE_ID_VIA_VX900:
iga->fifo_high_threshold = iga->fifo_threshold = 320;
iga->display_queue_expire_num = 160;
diff --git a/drivers/gpu/drm/via/via_disp_reg.h b/drivers/gpu/drm/via/via_disp_reg.h
index 7fa8e1a..9b8e268 100644
--- a/drivers/gpu/drm/via/via_disp_reg.h
+++ b/drivers/gpu/drm/via/via_disp_reg.h
@@ -453,32 +453,32 @@ static struct vga_regset iga2_ver_sync_end[] = {
};
/* IGA1 pixel timing Registers */
-#define IGA1_PIX_H_TOTAL_REG 0x8400 //[15:0]
-#define IGA1_PIX_H_ADDR_REG 0x8400 //[31:16]
-#define IGA1_PIX_H_BNK_ST_REG 0x8404 //[15:0]
-#define IGA1_PIX_H_BNK_END_REG 0x8404 //[31:16]
-#define IGA1_PIX_H_SYNC_ST_REG 0x8408 //[15:0]
-#define IGA1_PIX_H_SYNC_END_REG 0x8408 //[31:16]
-#define IGA1_PIX_V_TOTAL_REG 0x8424 //[10:0]
-#define IGA1_PIX_V_ADDR_REG 0x8424 //[26:16]
-#define IGA1_PIX_V_BNK_ST_REG 0x8428 //[10:0]
-#define IGA1_PIX_V_BNK_END_REG 0x8428 //[26:16]
-#define IGA1_PIX_V_SYNC_ST_REG 0x842C //[10:0]
-#define IGA1_PIX_V_SYNC_END_REG 0x842C //[15:12]
-#define IGA1_PIX_HALF_LINE_REG 0x8434 //[15:0]
-
-#define IGA1_PIX_H_TOTAL_MASK 0x0000FFFF //[15:0]
-#define IGA1_PIX_H_ADDR_MASK 0xFFFF0000 //[31:16]
-#define IGA1_PIX_H_BNK_ST_MASK 0x0000FFFF //[15:0]
-#define IGA1_PIX_H_BNK_END_MASK 0xFFFF0000 //[31:16]
-#define IGA1_PIX_H_SYNC_ST_MASK 0x0000FFFF //[15:0]
-#define IGA1_PIX_H_SYNC_END_MASK 0xFFFF0000 //[31:16]
-#define IGA1_PIX_V_TOTAL_MASK 0x000007FF //[10:0]
-#define IGA1_PIX_V_ADDR_MASK 0x07FF0000 //[26:16]
-#define IGA1_PIX_V_BNK_ST_MASK 0x000007FF //[10:0]
-#define IGA1_PIX_V_BNK_END_MASK 0x07FF0000 //[26:16]
-#define IGA1_PIX_V_SYNC_ST_MASK 0x000007FF //[10:0]
-#define IGA1_PIX_V_SYNC_END_MASK 0x0000F000 //[15:12]
-#define IGA1_PIX_HALF_LINE_MASK 0x0000FFFF //[15:0]
+#define IGA1_PIX_H_TOTAL_REG 0x8400 /* [15:0] */
+#define IGA1_PIX_H_ADDR_REG 0x8400 /* [31:16] */
+#define IGA1_PIX_H_BNK_ST_REG 0x8404 /* [15:0] */
+#define IGA1_PIX_H_BNK_END_REG 0x8404 /* [31:16] */
+#define IGA1_PIX_H_SYNC_ST_REG 0x8408 /* [15:0] */
+#define IGA1_PIX_H_SYNC_END_REG 0x8408 /* [31:16] */
+#define IGA1_PIX_V_TOTAL_REG 0x8424 /* [10:0] */
+#define IGA1_PIX_V_ADDR_REG 0x8424 /* [26:16] */
+#define IGA1_PIX_V_BNK_ST_REG 0x8428 /* [10:0] */
+#define IGA1_PIX_V_BNK_END_REG 0x8428 /* [26:16] */
+#define IGA1_PIX_V_SYNC_ST_REG 0x842C /* [10:0] */
+#define IGA1_PIX_V_SYNC_END_REG 0x842C /* [15:12] */
+#define IGA1_PIX_HALF_LINE_REG 0x8434 /* [15:0] */
+
+#define IGA1_PIX_H_TOTAL_MASK 0x0000FFFF /* [15:0] */
+#define IGA1_PIX_H_ADDR_MASK 0xFFFF0000 /* [31:16] */
+#define IGA1_PIX_H_BNK_ST_MASK 0x0000FFFF /* [15:0] */
+#define IGA1_PIX_H_BNK_END_MASK 0xFFFF0000 /* [31:16] */
+#define IGA1_PIX_H_SYNC_ST_MASK 0x0000FFFF /* [15:0] */
+#define IGA1_PIX_H_SYNC_END_MASK 0xFFFF0000 /* [31:16] */
+#define IGA1_PIX_V_TOTAL_MASK 0x000007FF /* [10:0] */
+#define IGA1_PIX_V_ADDR_MASK 0x07FF0000 /* [26:16] */
+#define IGA1_PIX_V_BNK_ST_MASK 0x000007FF /* [10:0] */
+#define IGA1_PIX_V_BNK_END_MASK 0x07FF0000 /* [26:16] */
+#define IGA1_PIX_V_SYNC_ST_MASK 0x000007FF /* [10:0] */
+#define IGA1_PIX_V_SYNC_END_MASK 0x0000F000 /* [15:12] */
+#define IGA1_PIX_HALF_LINE_MASK 0x0000FFFF /* [15:0] */
#endif
diff --git a/drivers/gpu/drm/via/via_display.c b/drivers/gpu/drm/via/via_display.c
index 4a7223d6..11818a3 100644
--- a/drivers/gpu/drm/via/via_display.c
+++ b/drivers/gpu/drm/via/via_display.c
@@ -133,8 +133,8 @@ via_encoder_commit(struct drm_encoder *encoder)
break;
case DISP_DI_DAC:
- if (iga->index) value = BIT(6);
-
+ if (iga->index)
+ value = BIT(6);
svga_wseq_mask(VGABASE, 0x16, value, BIT(6));
break;
diff --git a/drivers/gpu/drm/via/via_display.h b/drivers/gpu/drm/via/via_display.h
index a4da6c8..d01dd5e 100644
--- a/drivers/gpu/drm/via/via_display.h
+++ b/drivers/gpu/drm/via/via_display.h
@@ -148,7 +148,7 @@ extern void via_crtc_init(struct drm_device *dev, int index);
extern void via_set_sync_polarity(struct drm_encoder *encoder,
struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode);
-extern struct drm_encoder* via_best_encoder(struct drm_connector *connector);
+extern struct drm_encoder *via_best_encoder(struct drm_connector *connector);
extern void via_encoder_cleanup(struct drm_encoder *encoder);
extern void via_encoder_prepare(struct drm_encoder *encoder);
extern void via_encoder_disable(struct drm_encoder *encoder);
diff --git a/drivers/gpu/drm/via/via_dma.h b/drivers/gpu/drm/via/via_dma.h
index b002475..cbdade4 100644
--- a/drivers/gpu/drm/via/via_dma.h
+++ b/drivers/gpu/drm/via/via_dma.h
@@ -38,14 +38,14 @@
#define VIA_OUT_RING_H1(nReg, nData) { \
*((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
*((uint32_t *)(vb) + 1) = (nData); \
- vb = ((uint32_t *)vb) + 2; \
- dev_priv->dma_low += 8; \
+ vb = ((uint32_t *)vb) + 2; \
+ dev_priv->dma_low += 8; \
}
/* For H5/6 2D cmd load(Two value :cmd with address)***/
#define VIA_OUT_RING_QW(w1, w2) do { \
- *vb++ = (w1); \
- *vb++ = (w2); \
+ *vb++ = (w1); \
+ *vb++ = (w2); \
dev_priv->dma_low += 8; \
} while (0)
diff --git a/drivers/gpu/drm/via/via_drv.c b/drivers/gpu/drm/via/via_drv.c
index 2a8592b..0671497 100644
--- a/drivers/gpu/drm/via/via_drv.c
+++ b/drivers/gpu/drm/via/via_drv.c
@@ -297,7 +297,7 @@ static int via_driver_unload(struct drm_device *dev)
/* mtrr delete the vram */
if (drm_core_has_MTRR(dev) && (dev_priv->vram_mtrr >= 0))
- arch_phys_wc_del(dev_priv->vram_mtrr);
+ arch_phys_wc_del(dev_priv->vram_mtrr);
ttm_global_fini(&dev_priv->mem_global_ref,
&dev_priv->bo_global_ref,
diff --git a/drivers/gpu/drm/via/via_drv.h b/drivers/gpu/drm/via/via_drv.h
index 56c2237..8cb899b 100644
--- a/drivers/gpu/drm/via/via_drv.h
+++ b/drivers/gpu/drm/via/via_drv.h
@@ -92,8 +92,8 @@ typedef struct drm_via_irq {
} drm_via_irq_t;
struct sgdma_tt {
- struct ttm_dma_tt sgdma;
- unsigned long offset;
+ struct ttm_dma_tt sgdma;
+ unsigned long offset;
};
struct via_state {
diff --git a/drivers/gpu/drm/via/via_fb.c b/drivers/gpu/drm/via/via_fb.c
index 5cca9f2..45bbd662 100644
--- a/drivers/gpu/drm/via/via_fb.c
+++ b/drivers/gpu/drm/via/via_fb.c
@@ -412,7 +412,7 @@ km8xx_mem_type(struct drm_via_private *dev_priv)
return ret;
if (type & 0x01) { /* DDR3 */
- switch(tmp & 0x07) {
+ switch (tmp & 0x07) {
case 0x03:
dev_priv->vram_type = VIA_MEM_DDR3_800;
break;
@@ -428,7 +428,7 @@ km8xx_mem_type(struct drm_via_private *dev_priv)
break;
}
} else { /* DDR2 */
- switch(tmp & 0x07) {
+ switch (tmp & 0x07) {
case 0x00:
dev_priv->vram_type = VIA_MEM_DDR2_400;
break;
@@ -456,7 +456,7 @@ km8xx_mem_type(struct drm_via_private *dev_priv)
if (ret)
return ret;
- switch(tmp & 0x07) {
+ switch (tmp & 0x07) {
case 0x01:
dev_priv->vram_type = VIA_MEM_DDR2_533;
break;
@@ -542,7 +542,7 @@ cn700_mem_type(struct drm_via_private *dev_priv, struct pci_dev *fn3)
ret = pci_read_config_byte(fn3, 0x90, &tmp);
if (!ret) {
- switch(tmp & 0x07) {
+ switch (tmp & 0x07) {
case 0x00:
dev_priv->vram_type = VIA_MEM_DDR_200;
break;
@@ -639,7 +639,7 @@ vx900_mem_type(struct drm_via_private *dev_priv, struct pci_dev *fn3)
type &= 0xC0;
type >>= 6;
volt &= 0x20;
- volt >>=5;
+ volt >>= 5;
switch (type) {
case 1:
@@ -1151,7 +1151,8 @@ drmfb_helper_pan_display(struct fb_var_screeninfo *var,
}
}
}
- if (ret) info->flags &= ~FBINFO_HWACCEL_YPAN;
+ if (ret)
+ info->flags &= ~FBINFO_HWACCEL_YPAN;
mutex_unlock(&dev->mode_config.mutex);
return ret;
}
diff --git a/drivers/gpu/drm/via/via_fence.h b/drivers/gpu/drm/via/via_fence.h
index eb4f462..1883432 100644
--- a/drivers/gpu/drm/via/via_fence.h
+++ b/drivers/gpu/drm/via/via_fence.h
@@ -70,7 +70,7 @@ struct via_fence {
* stored in a hash key */
struct drm_hash_item seq;
/* the time to wait for the fence object signal */
- unsigned long timeout;
+ unsigned long timeout;
/* Which engine this belongs too */
int engine;
/* the reference information of this fence object */
diff --git a/drivers/gpu/drm/via/via_h1_cmdbuf.c b/drivers/gpu/drm/via/via_h1_cmdbuf.c
index c235e2a..e5087f9 100644
--- a/drivers/gpu/drm/via/via_h1_cmdbuf.c
+++ b/drivers/gpu/drm/via/via_h1_cmdbuf.c
@@ -111,7 +111,7 @@ via_cmdbuf_wait(struct drm_via_private *dev_priv, unsigned int size)
* Returns virtual pointer to ring buffer.
*/
-static inline uint32_t *via_check_dma(struct drm_via_private * dev_priv,
+static inline uint32_t *via_check_dma(struct drm_via_private *dev_priv,
unsigned int size)
{
if ((dev_priv->dma_low + size + 4 * CMDBUF_ALIGNMENT_SIZE) >
@@ -236,12 +236,10 @@ int via_dispatch_cmdbuffer(struct drm_device *dev, drm_via_cmdbuffer_t *cmd)
* we run it on a temporary cacheable system memory buffer and
* copy it to AGP memory when ready.
*/
-
- if ((ret =
- via_verify_command_stream((uint32_t *) dev_priv->pci_buf,
- cmd->size, dev, 1))) {
+ ret = via_verify_command_stream((uint32_t *) dev_priv->pci_buf,
+ cmd->size, dev, 1);
+ if (ret)
return ret;
- }
vb = via_check_dma(dev_priv, (cmd->size < 0x100) ? 0x102 : cmd->size);
if (vb == NULL)
@@ -304,11 +302,10 @@ static int via_dispatch_pci_cmdbuffer(struct drm_device *dev,
if (DRM_COPY_FROM_USER(dev_priv->pci_buf, cmd->buf, cmd->size))
return -EFAULT;
- if ((ret =
- via_verify_command_stream((uint32_t *) dev_priv->pci_buf,
- cmd->size, dev, 0))) {
+ ret = via_verify_command_stream((uint32_t *) dev_priv->pci_buf,
+ cmd->size, dev, 0);
+ if (ret)
return ret;
- }
ret =
via_parse_command_stream(dev, (const uint32_t *)dev_priv->pci_buf,
@@ -330,7 +327,7 @@ int via_pci_cmdbuffer(struct drm_device *dev, void *data, struct drm_file *file_
}
static inline uint32_t *via_align_buffer(struct drm_via_private *dev_priv,
- uint32_t * vb, int qw_count)
+ uint32_t *vb, int qw_count)
{
for (; qw_count > 0; --qw_count)
VIA_OUT_RING_QW(HC_DUMMY, HC_DUMMY);
@@ -510,7 +507,7 @@ static void via_cmdbuf_start(struct drm_via_private *dev_priv)
reader = ioread32(dev_priv->hw_addr_ptr);
ptr = ((volatile void *)dev_priv->last_pause_ptr - dev_priv->dmabuf.virtual) +
- dev_priv->dma_offset + 4;
+ dev_priv->dma_offset + 4;
/*
* This is the difference between where we tell the
diff --git a/drivers/gpu/drm/via/via_hdmi.c b/drivers/gpu/drm/via/via_hdmi.c
index b37405a..e2e0666 100644
--- a/drivers/gpu/drm/via/via_hdmi.c
+++ b/drivers/gpu/drm/via/via_hdmi.c
@@ -71,74 +71,73 @@ via_hdmi_enc_mode_fixup(struct drm_encoder *encoder,
uint32_t top_border = 0, bottom_border = 0;
if (adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) {
- /* when interlace mode,
- * we should consider halve vertical timings. */
- panelHSyncTime = adjusted_mode->hsync_end -
- adjusted_mode->hsync_start;
- panelVSyncTime = adjusted_mode->vsync_end / 2 -
- adjusted_mode->vsync_start / 2;
- panelHBlankStart = adjusted_mode->hdisplay;
- panelVBlankStart = adjusted_mode->vdisplay / 2;
- newHBlankStart = adjusted_mode->hdisplay - left_border;
- newVBlankStart = adjusted_mode->vdisplay / 2 - top_border;
-
- adjusted_mode->hdisplay =
- adjusted_mode->hdisplay - left_border - right_border;
- adjusted_mode->hsync_start =
- (adjusted_mode->hsync_start - panelHBlankStart) +
- newHBlankStart;
- adjusted_mode->hsync_end =
- adjusted_mode->hsync_start + panelHSyncTime;
-
- adjusted_mode->vdisplay = adjusted_mode->vdisplay / 2 -
- top_border - bottom_border;
- adjusted_mode->vsync_start =
- (adjusted_mode->vsync_start / 2 - panelVBlankStart) +
- newVBlankStart;
- adjusted_mode->vsync_end =
- adjusted_mode->vsync_start + panelVSyncTime;
-
+ /* when interlace mode, we should consider halve vertical
+ * timings. */
+ panelHSyncTime = adjusted_mode->hsync_end -
+ adjusted_mode->hsync_start;
+ panelVSyncTime = adjusted_mode->vsync_end / 2 -
+ adjusted_mode->vsync_start / 2;
+ panelHBlankStart = adjusted_mode->hdisplay;
+ panelVBlankStart = adjusted_mode->vdisplay / 2;
+ newHBlankStart = adjusted_mode->hdisplay - left_border;
+ newVBlankStart = adjusted_mode->vdisplay / 2 - top_border;
+
+ adjusted_mode->hdisplay =
+ adjusted_mode->hdisplay - left_border - right_border;
+ adjusted_mode->hsync_start =
+ (adjusted_mode->hsync_start - panelHBlankStart) +
+ newHBlankStart;
+ adjusted_mode->hsync_end =
+ adjusted_mode->hsync_start + panelHSyncTime;
+
+ adjusted_mode->vdisplay = adjusted_mode->vdisplay / 2 -
+ top_border - bottom_border;
+ adjusted_mode->vsync_start =
+ (adjusted_mode->vsync_start / 2 - panelVBlankStart) +
+ newVBlankStart;
+ adjusted_mode->vsync_end =
+ adjusted_mode->vsync_start + panelVSyncTime;
} else {
- panelHSyncTime =
- adjusted_mode->hsync_end - adjusted_mode->hsync_start;
- panelVSyncTime =
- adjusted_mode->vsync_end - adjusted_mode->vsync_start;
- panelHBlankStart = adjusted_mode->hdisplay;
- panelVBlankStart = adjusted_mode->vdisplay;
- newHBlankStart = adjusted_mode->hdisplay - left_border;
- newVBlankStart = adjusted_mode->vdisplay - top_border;
-
- adjusted_mode->hdisplay =
- adjusted_mode->hdisplay - left_border - right_border;
- adjusted_mode->hsync_start =
- (adjusted_mode->hsync_start - panelHBlankStart) +
- newHBlankStart;
- adjusted_mode->hsync_end =
- adjusted_mode->hsync_start + panelHSyncTime;
-
- adjusted_mode->vdisplay =
- adjusted_mode->vdisplay - top_border - bottom_border;
- adjusted_mode->vsync_start =
- (adjusted_mode->vsync_start - panelVBlankStart) +
- newVBlankStart;
- adjusted_mode->vsync_end =
- adjusted_mode->vsync_start + panelVSyncTime;
- }
+ panelHSyncTime =
+ adjusted_mode->hsync_end - adjusted_mode->hsync_start;
+ panelVSyncTime =
+ adjusted_mode->vsync_end - adjusted_mode->vsync_start;
+ panelHBlankStart = adjusted_mode->hdisplay;
+ panelVBlankStart = adjusted_mode->vdisplay;
+ newHBlankStart = adjusted_mode->hdisplay - left_border;
+ newVBlankStart = adjusted_mode->vdisplay - top_border;
+
+ adjusted_mode->hdisplay =
+ adjusted_mode->hdisplay - left_border - right_border;
+ adjusted_mode->hsync_start =
+ (adjusted_mode->hsync_start - panelHBlankStart) +
+ newHBlankStart;
+ adjusted_mode->hsync_end =
+ adjusted_mode->hsync_start + panelHSyncTime;
+
+ adjusted_mode->vdisplay =
+ adjusted_mode->vdisplay - top_border - bottom_border;
+ adjusted_mode->vsync_start =
+ (adjusted_mode->vsync_start - panelVBlankStart) +
+ newVBlankStart;
+ adjusted_mode->vsync_end =
+ adjusted_mode->vsync_start + panelVSyncTime;
+ }
/* Adjust crtc H and V */
- adjusted_mode->crtc_hdisplay = adjusted_mode->hdisplay;
- adjusted_mode->crtc_hblank_start = newHBlankStart;
- adjusted_mode->crtc_hblank_end =
- adjusted_mode->crtc_htotal - left_border;
- adjusted_mode->crtc_hsync_start = adjusted_mode->hsync_start;
- adjusted_mode->crtc_hsync_end = adjusted_mode->hsync_end;
-
- adjusted_mode->crtc_vdisplay = adjusted_mode->vdisplay;
- adjusted_mode->crtc_vblank_start = newVBlankStart;
- adjusted_mode->crtc_vblank_end =
- adjusted_mode->crtc_vtotal - top_border;
- adjusted_mode->crtc_vsync_start = adjusted_mode->vsync_start;
- adjusted_mode->crtc_vsync_end = adjusted_mode->vsync_end;
+ adjusted_mode->crtc_hdisplay = adjusted_mode->hdisplay;
+ adjusted_mode->crtc_hblank_start = newHBlankStart;
+ adjusted_mode->crtc_hblank_end =
+ adjusted_mode->crtc_htotal - left_border;
+ adjusted_mode->crtc_hsync_start = adjusted_mode->hsync_start;
+ adjusted_mode->crtc_hsync_end = adjusted_mode->hsync_end;
+
+ adjusted_mode->crtc_vdisplay = adjusted_mode->vdisplay;
+ adjusted_mode->crtc_vblank_start = newVBlankStart;
+ adjusted_mode->crtc_vblank_end =
+ adjusted_mode->crtc_vtotal - top_border;
+ adjusted_mode->crtc_vsync_start = adjusted_mode->vsync_start;
+ adjusted_mode->crtc_vsync_end = adjusted_mode->vsync_end;
drm_mode_set_crtcinfo(adjusted_mode, 0);
return true;
diff --git a/drivers/gpu/drm/via/via_i2c.c b/drivers/gpu/drm/via/via_i2c.c
index f4fcdea..129b307 100644
--- a/drivers/gpu/drm/via/via_i2c.c
+++ b/drivers/gpu/drm/via/via_i2c.c
@@ -49,7 +49,7 @@ static int via_i2c_getscl(void *data)
struct drm_device *dev = i2c_get_adapdata(&i2c->adapter);
struct drm_via_private *dev_priv = dev->dev_private;
- return (vga_rseq(VGABASE, i2c->i2c_port) & BIT(3));
+ return vga_rseq(VGABASE, i2c->i2c_port) & BIT(3);
}
static int via_i2c_getsda(void *data)
@@ -58,7 +58,7 @@ static int via_i2c_getsda(void *data)
struct drm_device *dev = i2c_get_adapdata(&i2c->adapter);
struct drm_via_private *dev_priv = dev->dev_private;
- return (vga_rseq(VGABASE, i2c->i2c_port) & BIT(2));
+ return vga_rseq(VGABASE, i2c->i2c_port) & BIT(2);
}
static void via_i2c_setsda(void *data, int state)
diff --git a/drivers/gpu/drm/via/via_pm.c b/drivers/gpu/drm/via/via_pm.c
index 874540a..7c35c8a 100644
--- a/drivers/gpu/drm/via/via_pm.c
+++ b/drivers/gpu/drm/via/via_pm.c
@@ -176,7 +176,8 @@ via_init_vq(struct drm_via_private *dev_priv)
unsigned long vqstartl, vqendl, vqstart_endh;
struct ttm_buffer_object *bo = dev_priv->vq.bo;
- if (!bo) return;
+ if (!bo)
+ return;
vq_start_addr = bo->offset;
vq_end_addr = vq_start_addr + bo->mem.size - 1;
diff --git a/drivers/gpu/drm/via/via_ttm.c b/drivers/gpu/drm/via/via_ttm.c
index 5d6aead..ac1bfcb 100644
--- a/drivers/gpu/drm/via/via_ttm.c
+++ b/drivers/gpu/drm/via/via_ttm.c
@@ -229,7 +229,7 @@ via_alloc_desc_pages(struct ttm_tt *ttm, struct drm_device *dev,
vsg->ttm = ttm;
vsg->dev_start = dev_start;
vsg->direction = direction;
- vsg->num_desc = ttm->num_pages; // + 1;
+ vsg->num_desc = ttm->num_pages;
vsg->descriptors_per_page = PAGE_SIZE / desc_size;
vsg->num_desc_pages = (vsg->num_desc + vsg->descriptors_per_page - 1) /
vsg->descriptors_per_page;
diff --git a/drivers/gpu/drm/via/via_verifier.c b/drivers/gpu/drm/via/via_verifier.c
index 9e1da0d..139a7bd9 100644
--- a/drivers/gpu/drm/via/via_verifier.c
+++ b/drivers/gpu/drm/via/via_verifier.c
@@ -243,7 +243,7 @@ static enum hazard table1[256];
static enum hazard table2[256];
static enum hazard table3[256];
-static __inline__ int
+static inline int
eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
{
if ((buf_end - *buf) >= num_words) {
@@ -258,7 +258,7 @@ eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words)
* Partially stolen from drm_memory.h
*/
-static __inline__ drm_local_map_t *via_drm_lookup_agp_map(struct drm_via_state *seq,
+static inline drm_local_map_t *via_drm_lookup_agp_map(struct drm_via_state *seq,
unsigned long offset,
unsigned long size,
struct drm_device *dev)
@@ -295,7 +295,7 @@ static __inline__ drm_local_map_t *via_drm_lookup_agp_map(struct drm_via_state *
* very little CPU time.
*/
-static __inline__ int finish_current_sequence(struct drm_via_state * cur_seq)
+static inline int finish_current_sequence(struct drm_via_state *cur_seq)
{
switch (cur_seq->unfinished) {
case z_address:
@@ -352,7 +352,7 @@ static __inline__ int finish_current_sequence(struct drm_via_state * cur_seq)
return 0;
}
-static __inline__ int
+static inline int
investigate_hazard(uint32_t cmd, enum hazard hz, struct drm_via_state *cur_seq)
{
register uint32_t tmp, *tmp_addr;
@@ -525,7 +525,7 @@ investigate_hazard(uint32_t cmd, enum hazard hz, struct drm_via_state *cur_seq)
return 2;
}
-static __inline__ int
+static inline int
via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
struct drm_via_state *cur_seq)
{
@@ -629,7 +629,7 @@ via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end,
return ret;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_check_header2(uint32_t const **buffer, const uint32_t *buf_end,
struct drm_via_state *hc_state)
{
@@ -721,7 +721,7 @@ via_check_header2(uint32_t const **buffer, const uint32_t *buf_end,
return state_command;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_parse_header2(struct drm_via_private *dev_priv, uint32_t const **buffer,
const uint32_t *buf_end, int *fire_count)
{
@@ -770,7 +770,7 @@ via_parse_header2(struct drm_via_private *dev_priv, uint32_t const **buffer,
return state_command;
}
-static __inline__ int verify_mmio_address(uint32_t address)
+static inline int verify_mmio_address(uint32_t address)
{
if ((address > 0x3FF) && (address < 0xC00)) {
DRM_ERROR("Invalid VIDEO DMA command. "
@@ -800,7 +800,7 @@ static inline int is_dummy_cmd(uint32_t cmd)
return 0;
}
-static __inline__ int
+static inline int
verify_video_tail(uint32_t const **buffer, const uint32_t * buf_end,
uint32_t dwords)
{
@@ -821,7 +821,7 @@ verify_video_tail(uint32_t const **buffer, const uint32_t * buf_end,
return 0;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
{
uint32_t cmd;
@@ -853,7 +853,7 @@ via_check_header1(uint32_t const **buffer, const uint32_t * buf_end)
return ret;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_parse_header1(struct drm_via_private *dev_priv, uint32_t const **buffer,
const uint32_t *buf_end)
{
@@ -882,7 +882,7 @@ via_parse_header1(struct drm_via_private *dev_priv, uint32_t const **buffer,
return state_command;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_check_vheader5(uint32_t const **buffer, const uint32_t *buf_end)
{
uint32_t data;
@@ -915,7 +915,7 @@ via_check_vheader5(uint32_t const **buffer, const uint32_t *buf_end)
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_parse_vheader5(struct drm_via_private *dev_priv, uint32_t const **buffer,
const uint32_t *buf_end)
{
@@ -933,7 +933,7 @@ via_parse_vheader5(struct drm_via_private *dev_priv, uint32_t const **buffer,
return state_command;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
{
uint32_t data;
@@ -970,7 +970,7 @@ via_check_vheader6(uint32_t const **buffer, const uint32_t * buf_end)
return state_command;
}
-static __inline__ enum verifier_state
+static inline enum verifier_state
via_parse_vheader6(struct drm_via_private *dev_priv, uint32_t const **buffer,
const uint32_t *buf_end)
{
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