[Openchrome-devel] xf86-video-openchrome: 2 commits - configure.ac src/via_display.c src/via_driver.h src/via_ums.c
Kevin Brace
kevinbrace at kemper.freedesktop.org
Thu Apr 14 04:53:10 UTC 2016
configure.ac | 2
src/via_display.c | 186 ------------------------------------------------------
src/via_driver.h | 5 +
src/via_ums.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++++++++
4 files changed, 190 insertions(+), 185 deletions(-)
New commits:
commit 2fbf3cc4f2cb60c26e8faaa7f65c0801db047efe
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Apr 13 21:46:20 2016 -0700
Version bumped to 0.4.109
The previous commit was a high risk one, so the version should be
bumped up just in case it goes wrong.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/configure.ac b/configure.ac
index 503595b..893cbf2 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
# Initialize Autoconf
AC_PREREQ(2.57)
AC_INIT([xf86-video-openchrome],
- [0.4.108],
+ [0.4.109],
[https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
[xf86-video-openchrome])
commit 30f15813491a4e6fc9bbae6e49e66340c1eecc3c
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Wed Apr 13 21:42:51 2016 -0700
Moving UMSCrtcInit from via_display.c to via_ums.c
When learning about the structure of the code, it made no sense that
a function named UMSCrtcInit is located inside via_display.c and not
via_ums.c. It is a risky thing to do, but the code appears to be
working fine.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index c5541f9..fc9b497 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -1207,7 +1207,7 @@ iga_crtc_destroy(xf86CrtcPtr crtc)
free(crtc->driver_private);
}
-static const xf86CrtcFuncsRec iga1_crtc_funcs = {
+extern const xf86CrtcFuncsRec iga1_crtc_funcs = {
.dpms = iga1_crtc_dpms,
.save = iga1_crtc_save,
.restore = iga1_crtc_restore,
@@ -1610,7 +1610,7 @@ iga2_crtc_hide_cursor(xf86CrtcPtr crtc)
}
}
-static const xf86CrtcFuncsRec iga2_crtc_funcs = {
+extern const xf86CrtcFuncsRec iga2_crtc_funcs = {
.dpms = iga2_crtc_dpms,
.save = iga2_crtc_save,
.restore = iga2_crtc_restore,
@@ -1634,185 +1634,3 @@ static const xf86CrtcFuncsRec iga2_crtc_funcs = {
#endif
.destroy = iga_crtc_destroy,
};
-
-Bool
-UMSCrtcInit(ScrnInfoPtr pScrn)
-{
- drmmode_crtc_private_ptr iga1_rec = NULL, iga2_rec = NULL;
- vgaHWPtr hwp = VGAHWPTR(pScrn);
- VIAPtr pVia = VIAPTR(pScrn);
-#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,8,0,0,0)
- ClockRangePtr clockRanges;
-#else
- ClockRangesPtr clockRanges;
-#endif
- int max_pitch, max_height;
- VIABIOSInfoPtr pBIOSInfo;
- xf86CrtcPtr iga1, iga2;
-
- /* Read memory bandwidth from registers. */
- pVia->MemClk = hwp->readCrtc(hwp, 0x3D) >> 4;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Detected MemClk %d\n", pVia->MemClk));
- if (pVia->MemClk >= VIA_MEM_END) {
- xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
- "Unknown Memory clock: %d\n", pVia->MemClk);
- pVia->MemClk = VIA_MEM_END - 1;
- }
- pBIOSInfo = pVia->pBIOSInfo;
- pBIOSInfo->Bandwidth = ViaGetMemoryBandwidth(pScrn);
-
- if (pBIOSInfo->TVType == TVTYPE_NONE) {
- /* Use jumper to determine TV type. */
- if (hwp->readCrtc(hwp, 0x3B) & 0x02) {
- pBIOSInfo->TVType = TVTYPE_PAL;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Detected TV standard: PAL.\n"));
- } else {
- pBIOSInfo->TVType = TVTYPE_NTSC;
- DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
- "Detected TV standard: NTSC.\n"));
- }
- }
-
- if (pVia->drmmode.hwcursor) {
- if (!xf86LoadSubModule(pScrn, "ramdac"))
- return FALSE;
- }
-
- if (!xf86LoadSubModule(pScrn, "i2c"))
- return FALSE;
- else
- ViaI2CInit(pScrn);
-
- if (!xf86LoadSubModule(pScrn, "ddc"))
- return FALSE;
-
- /*
- * Set up ClockRanges, which describe what clock ranges are
- * available, and what sort of modes they can be used for.
- */
-
-#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,8,0,0,0)
- clockRanges = xnfalloc(sizeof(ClockRange));
-#else
- clockRanges = xnfalloc(sizeof(ClockRanges));
-#endif
- clockRanges->next = NULL;
- clockRanges->minClock = 20000;
- clockRanges->maxClock = 230000;
-
- clockRanges->clockIndex = -1;
- clockRanges->interlaceAllowed = TRUE;
- clockRanges->doubleScanAllowed = FALSE;
- pScrn->clockRanges = clockRanges;
-
- /*
- * Now handle the outputs
- */
- iga1_rec = (drmmode_crtc_private_ptr) xnfcalloc(sizeof(drmmode_crtc_private_rec), 1);
- if (!iga1_rec) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "IGA1 Rec allocation failed.\n");
- return FALSE;
- }
-
- iga1 = xf86CrtcCreate(pScrn, &iga1_crtc_funcs);
- if (!iga1) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86CrtcCreate failed.\n");
- free(iga1_rec);
- return FALSE;
- }
- iga1_rec->drmmode = &pVia->drmmode;
- iga1_rec->index = 0;
- iga1->driver_private = iga1_rec;
-
- iga2_rec = (drmmode_crtc_private_ptr) xnfcalloc(sizeof(drmmode_crtc_private_rec), 1);
- if (!iga2_rec) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "IGA1 Rec allocation failed.\n");
- xf86CrtcDestroy(iga1);
- return FALSE;
- }
-
- iga2 = xf86CrtcCreate(pScrn, &iga2_crtc_funcs);
- if (!iga2) {
- xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86CrtcCreate failed.\n");
- xf86CrtcDestroy(iga1);
- free(iga2_rec);
- return FALSE;
- }
- iga2_rec->drmmode = &pVia->drmmode;
- iga2_rec->index = 1;
- iga2->driver_private = iga2_rec;
-
- /*
- * CLE266A:
- * Max Line Pitch: 4080, (FB corruption when higher, driver problem?)
- * Max Height: 4096 (and beyond)
- *
- * CLE266A: primary AdjustFrame can use only 24 bits, so we are limited
- * to 12x11 bits; 4080x2048 (~2:1), 3344x2508 (4:3), or 2896x2896 (1:1).
- * TODO Test CLE266Cx, KM400, KM400A, K8M800, CN400 please.
- *
- * We should be able to limit the memory available for a mode to 32 MB,
- * but miScanLineWidth fails to catch this properly (apertureSize).
- */
- switch (pVia->Chipset) {
- case VIA_CLE266:
- case VIA_KM400:
- case VIA_K8M800:
- case VIA_PM800:
- case VIA_P4M800PRO:
- max_pitch = 3344;
- max_height = 2508;
- break;
-
- case VIA_CX700:
- case VIA_P4M890:
- case VIA_K8M890:
- case VIA_P4M900:
- max_pitch = 8192/(pScrn->bitsPerPixel >> 3)-1;
- max_height = max_pitch;
- break;
-
- default:
- max_pitch = 16384/(pScrn->bitsPerPixel >> 3)-1;
- max_height = max_pitch;
- break;
- }
-
- /* Init HI_X0 for cursor */
- switch (pVia->Chipset) {
- case VIA_CX700:
- /* case VIA_CN750: */
- case VIA_P4M890:
- case VIA_P4M900:
- case VIA_VX800:
- case VIA_VX855:
- case VIA_VX900:
- /* set 0 as transparent color key for IGA 2 */
- VIASETREG(HI_TRANSPARENT_COLOR, 0);
- VIASETREG(HI_INVTCOLOR, 0X00FFFFFF);
- VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
- VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
-
- /* set 0 as transparent color key for IGA 1 */
- VIASETREG(PRIM_HI_TRANSCOLOR, 0);
- VIASETREG(PRIM_HI_FIFO, 0x0D000D0F);
- VIASETREG(PRIM_HI_INVTCOLOR, 0x00FFFFFF);
- VIASETREG(V327_HI_INVTCOLOR, 0x00FFFFFF);
- break;
-
- default:
- VIASETREG(HI_TRANSPARENT_COLOR, 0);
- VIASETREG(HI_INVTCOLOR, 0X00FFFFFF);
- VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
- VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
- break;
- }
-
- xf86CrtcSetSizeRange(pScrn, 320, 200, max_pitch, max_height);
-
- ViaOutputsDetect(pScrn);
-
- return TRUE;
-}
diff --git a/src/via_driver.h b/src/via_driver.h
index fb367f9..7c56b8e 100644
--- a/src/via_driver.h
+++ b/src/via_driver.h
@@ -392,6 +392,11 @@ typedef struct
ScrnInfoPtr pPrimaryScrn;
} VIAEntRec, *VIAEntPtr;
+
+/* In via_display.c. */
+const xf86CrtcFuncsRec iga1_crtc_funcs;
+const xf86CrtcFuncsRec iga2_crtc_funcs;
+
/* In via_exa.c. */
Bool viaInitExa(ScreenPtr pScreen);
Bool viaAccelSetMode(int bpp, ViaTwodContext * tdc);
diff --git a/src/via_ums.c b/src/via_ums.c
index 551e445..e911fe1 100644
--- a/src/via_ums.c
+++ b/src/via_ums.c
@@ -875,3 +875,185 @@ UMSPreInit(ScrnInfoPtr pScrn)
return FALSE;
return TRUE;
}
+
+Bool
+UMSCrtcInit(ScrnInfoPtr pScrn)
+{
+ drmmode_crtc_private_ptr iga1_rec = NULL, iga2_rec = NULL;
+ vgaHWPtr hwp = VGAHWPTR(pScrn);
+ VIAPtr pVia = VIAPTR(pScrn);
+#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,8,0,0,0)
+ ClockRangePtr clockRanges;
+#else
+ ClockRangesPtr clockRanges;
+#endif
+ int max_pitch, max_height;
+ VIABIOSInfoPtr pBIOSInfo;
+ xf86CrtcPtr iga1, iga2;
+
+ /* Read memory bandwidth from registers. */
+ pVia->MemClk = hwp->readCrtc(hwp, 0x3D) >> 4;
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Detected MemClk %d\n", pVia->MemClk));
+ if (pVia->MemClk >= VIA_MEM_END) {
+ xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+ "Unknown Memory clock: %d\n", pVia->MemClk);
+ pVia->MemClk = VIA_MEM_END - 1;
+ }
+ pBIOSInfo = pVia->pBIOSInfo;
+ pBIOSInfo->Bandwidth = ViaGetMemoryBandwidth(pScrn);
+
+ if (pBIOSInfo->TVType == TVTYPE_NONE) {
+ /* Use jumper to determine TV type. */
+ if (hwp->readCrtc(hwp, 0x3B) & 0x02) {
+ pBIOSInfo->TVType = TVTYPE_PAL;
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Detected TV standard: PAL.\n"));
+ } else {
+ pBIOSInfo->TVType = TVTYPE_NTSC;
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "Detected TV standard: NTSC.\n"));
+ }
+ }
+
+ if (pVia->drmmode.hwcursor) {
+ if (!xf86LoadSubModule(pScrn, "ramdac"))
+ return FALSE;
+ }
+
+ if (!xf86LoadSubModule(pScrn, "i2c"))
+ return FALSE;
+ else
+ ViaI2CInit(pScrn);
+
+ if (!xf86LoadSubModule(pScrn, "ddc"))
+ return FALSE;
+
+ /*
+ * Set up ClockRanges, which describe what clock ranges are
+ * available, and what sort of modes they can be used for.
+ */
+
+#if XORG_VERSION_CURRENT >= XORG_VERSION_NUMERIC(1,8,0,0,0)
+ clockRanges = xnfalloc(sizeof(ClockRange));
+#else
+ clockRanges = xnfalloc(sizeof(ClockRanges));
+#endif
+ clockRanges->next = NULL;
+ clockRanges->minClock = 20000;
+ clockRanges->maxClock = 230000;
+
+ clockRanges->clockIndex = -1;
+ clockRanges->interlaceAllowed = TRUE;
+ clockRanges->doubleScanAllowed = FALSE;
+ pScrn->clockRanges = clockRanges;
+
+ /*
+ * Now handle the outputs
+ */
+ iga1_rec = (drmmode_crtc_private_ptr) xnfcalloc(sizeof(drmmode_crtc_private_rec), 1);
+ if (!iga1_rec) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "IGA1 Rec allocation failed.\n");
+ return FALSE;
+ }
+
+ iga1 = xf86CrtcCreate(pScrn, &iga1_crtc_funcs);
+ if (!iga1) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86CrtcCreate failed.\n");
+ free(iga1_rec);
+ return FALSE;
+ }
+ iga1_rec->drmmode = &pVia->drmmode;
+ iga1_rec->index = 0;
+ iga1->driver_private = iga1_rec;
+
+ iga2_rec = (drmmode_crtc_private_ptr) xnfcalloc(sizeof(drmmode_crtc_private_rec), 1);
+ if (!iga2_rec) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "IGA1 Rec allocation failed.\n");
+ xf86CrtcDestroy(iga1);
+ return FALSE;
+ }
+
+ iga2 = xf86CrtcCreate(pScrn, &iga2_crtc_funcs);
+ if (!iga2) {
+ xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "xf86CrtcCreate failed.\n");
+ xf86CrtcDestroy(iga1);
+ free(iga2_rec);
+ return FALSE;
+ }
+ iga2_rec->drmmode = &pVia->drmmode;
+ iga2_rec->index = 1;
+ iga2->driver_private = iga2_rec;
+
+ /*
+ * CLE266A:
+ * Max Line Pitch: 4080, (FB corruption when higher, driver problem?)
+ * Max Height: 4096 (and beyond)
+ *
+ * CLE266A: primary AdjustFrame can use only 24 bits, so we are limited
+ * to 12x11 bits; 4080x2048 (~2:1), 3344x2508 (4:3), or 2896x2896 (1:1).
+ * TODO Test CLE266Cx, KM400, KM400A, K8M800, CN400 please.
+ *
+ * We should be able to limit the memory available for a mode to 32 MB,
+ * but miScanLineWidth fails to catch this properly (apertureSize).
+ */
+ switch (pVia->Chipset) {
+ case VIA_CLE266:
+ case VIA_KM400:
+ case VIA_K8M800:
+ case VIA_PM800:
+ case VIA_P4M800PRO:
+ max_pitch = 3344;
+ max_height = 2508;
+ break;
+
+ case VIA_CX700:
+ case VIA_P4M890:
+ case VIA_K8M890:
+ case VIA_P4M900:
+ max_pitch = 8192/(pScrn->bitsPerPixel >> 3)-1;
+ max_height = max_pitch;
+ break;
+
+ default:
+ max_pitch = 16384/(pScrn->bitsPerPixel >> 3)-1;
+ max_height = max_pitch;
+ break;
+ }
+
+ /* Init HI_X0 for cursor */
+ switch (pVia->Chipset) {
+ case VIA_CX700:
+ /* case VIA_CN750: */
+ case VIA_P4M890:
+ case VIA_P4M900:
+ case VIA_VX800:
+ case VIA_VX855:
+ case VIA_VX900:
+ /* set 0 as transparent color key for IGA 2 */
+ VIASETREG(HI_TRANSPARENT_COLOR, 0);
+ VIASETREG(HI_INVTCOLOR, 0X00FFFFFF);
+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
+
+ /* set 0 as transparent color key for IGA 1 */
+ VIASETREG(PRIM_HI_TRANSCOLOR, 0);
+ VIASETREG(PRIM_HI_FIFO, 0x0D000D0F);
+ VIASETREG(PRIM_HI_INVTCOLOR, 0x00FFFFFF);
+ VIASETREG(V327_HI_INVTCOLOR, 0x00FFFFFF);
+ break;
+
+ default:
+ VIASETREG(HI_TRANSPARENT_COLOR, 0);
+ VIASETREG(HI_INVTCOLOR, 0X00FFFFFF);
+ VIASETREG(ALPHA_V3_PREFIFO_CONTROL, 0xE0000);
+ VIASETREG(ALPHA_V3_FIFO_CONTROL, 0xE0F0000);
+ break;
+ }
+
+ xf86CrtcSetSizeRange(pScrn, 320, 200, max_pitch, max_height);
+
+ ViaOutputsDetect(pScrn);
+
+ return TRUE;
+}
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