[Openchrome-devel] xf86-video-openchrome: 4 commits - configure.ac src/via_display.c

[Kevin Brace]

 configure.ac      |    2 +-
 src/via_display.c |   15 ++++++++++++---
 2 files changed, 13 insertions(+), 4 deletions(-)

New commits:
commit 46fa8e812f13e6cb00f1ec5eee936e089cd9886c
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Apr 20 23:21:58 2016 -0700

    Version bumped to 0.4.130
    
    Between Version 0.4.127 and 0.4.130, improvements were made to fix a
    bug where the LVDS FP (Flat Panel) screen will be lost when the
    computer resumes from ACPI S3 State. The fix is still not perfect, and
    mouse cursor might disappear after resuming, but this situation does not
    seem to occur if a VGA monitor is used simultaneously with an LVDS FP.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/configure.ac b/configure.ac
index 6fefaa0..37a4290 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
 # Initialize Autoconf
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        [0.4.129],
+        [0.4.130],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
         [xf86-video-openchrome])
 
commit 7ab39bcfa5f6c9cd99ea7b3ca734efff4c0264fe
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Apr 20 23:18:12 2016 -0700

    Setting LCD panel adjustment register for P4M900 / VN896 / CN896
    
    3X5.99[3:0] appears to be a register to adjust an LCD panel
    (the official name of the register is unknown). For P4M900
    and related chipsets (i.e., P4M900, VN896, and CN896), 0b1000 (8)
    will be set. Without setting this register correctly, when the
    computer resumes from ACPI S3 State, the LCD will become discolored.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 555951f..71fc903 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -661,6 +661,15 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
      * (Power Management Status). */
     ViaSeqMask(hwp, 0x2A, 0x0F, 0x0F);
 
+    /* 3X5.99[3:0] appears to be a register to adjust an LCD panel
+     * (the official name of the register is unknown). */
+    if (pVia->Chipset == VIA_P4M900) {
+        ViaCrtcMask(hwp, 0x99, 0x08, 0x0F);
+    }
+
+    /* IGA2 for DFP Low. */
+    ViaCrtcMask(hwp, 0x99, 0x10, 0x10);
+
     /* Use IGA2 for DVP1 Data Source Selection 0. */
     ViaCrtcMask(hwp, 0x9B, 0x10, 0x10);
 
commit ea604b9e656ad32e4537de6a5ac1b2038916e213
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Apr 20 19:20:35 2016 -0700

    Hexadecimal case change within viaIGA2SetDisplayRegister
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 429c097..555951f 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -661,8 +661,8 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
      * (Power Management Status). */
     ViaSeqMask(hwp, 0x2A, 0x0F, 0x0F);
 
-    /* Use IGA2 for DVP1 Data Source Selection 0 */
-    ViaCrtcMask(hwp, 0x9b, 0x10, 0x10);
+    /* Use IGA2 for DVP1 Data Source Selection 0. */
+    ViaCrtcMask(hwp, 0x9B, 0x10, 0x10);
 
     /* Linear Mode */
     ViaCrtcMask(hwp, 0x62, 0x00, 0x01);
commit f19a9ff965039ac0f90c07db3544420d30017b39
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Wed Apr 20 18:46:52 2016 -0700

    Code comment improvement within viaIGA2SetDisplayRegister
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 6c45543..429c097 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -658,7 +658,7 @@ viaIGA2SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
     }
 
     /* LVDS Channel 1 and 2 should be controlled by PMS
-     * (Power Management System?). */
+     * (Power Management Status). */
     ViaSeqMask(hwp, 0x2A, 0x0F, 0x0F);
 
     /* Use IGA2 for DVP1 Data Source Selection 0 */