[Openchrome-devel] xf86-video-openchrome: 5 commits - configure.ac src/via_driver.c src/via_outputs.c src/via_tv.c src/via_ums.h src/via_vt162x.c

Kevin Brace kevinbrace at kemper.freedesktop.org
Tue Aug 30 04:50:18 UTC 2016


 configure.ac      |    2 
 src/via_driver.c  |   31 ---------
 src/via_outputs.c |  151 ++++++++++++++++++++++++++++++++++++++++++------
 src/via_tv.c      |  169 +++++++++++++++++++++++++++++++++++++++++++++---------
 src/via_ums.h     |    7 +-
 src/via_vt162x.c  |   16 +----
 6 files changed, 285 insertions(+), 91 deletions(-)

New commits:
commit 068f0c8d5b8bd99b00d3a0a7105aaca1f618a9db
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Aug 29 21:49:17 2016 -0700

    Version bumped to 0.5.148
    
    Made major improvements in supporting an external TV encoder
    automatic detection and initialization, but since the TV output
    code is in a very poor shape, more works needs to be done to fix
    its issues.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/configure.ac b/configure.ac
index 766b3c2..d9bcdfc 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
 # Initialize Autoconf
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        [0.5.147],
+        [0.5.148],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
         [xf86-video-openchrome])
 
commit aff46f24fab98d6f2fb800159b82c6883202f9e8
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Aug 29 21:44:35 2016 -0700

    Got DIP0 and DIP1 confused for CLE266 chipset
    
    DIP0 (Digital Interface Port 0) is the port that can connect to an
    external TV encoder in CLE266 chipset, not DIP1. DIPx is equivalent
    to DVPx (Digital Video Port x) in newer devices.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_outputs.c b/src/via_outputs.c
index aa7a494..8e89ac0 100644
--- a/src/via_outputs.c
+++ b/src/via_outputs.c
@@ -47,58 +47,58 @@
 #include "via_mode.h"
 
 /*
- * Sets IGA1 or IGA2 as the display output source for DIP1
- * (Digital Interface Port 1) interface for CLE266 only.
+ * Sets IGA1 or IGA2 as the display output source for DIP0
+ * (Digital Interface Port 0) interface for CLE266 only.
  */
 void
-viaDIP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
+viaDIP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 {
     vgaHWPtr hwp = VGAHWPTR(pScrn);
     CARD8 temp = displaySource;
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                        "Entered viaDIP1SetDisplaySource.\n"));
+                        "Entered viaDIP0SetDisplaySource.\n"));
 
-    /* Set DIP1 display output source. */
-    /* 3X5.93[7] - DIP1 (Digital Interface Port 1) Data Source Selection
+    /* Set DIP0 display output source. */
+    /* 3X5.6C[7] - DIP0 (Digital Interface Port 0) Data Source Selection
      *             0: Primary Display (IGA1)
      *             1: Secondary Display (IGA2) */
-    ViaCrtcMask(hwp, 0x93, temp << 7, 0x80);
+    ViaCrtcMask(hwp, 0x6C, temp << 7, 0x80);
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                "DIP1 Display Output Source: IGA%d\n",
+                "DIP0 Display Output Source: IGA%d\n",
                 (temp & 0x01) + 1);
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                        "Exiting viaDIP1SetDisplaySource.\n"));
+                        "Exiting viaDIP0SetDisplaySource.\n"));
 }
 
 /*
- * Sets DIP1 (Digital Interface Port 1) I/O pad state.
+ * Sets DIP0 (Digital Interface Port 0) I/O pad state.
  * This function is for CLE266 chipset only.
  */
 void
-viaDIP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+viaDIP0EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
 {
     vgaHWPtr hwp = VGAHWPTR(pScrn);
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                        "Entered viaDIP1EnableIOPads.\n"));
+                        "Entered viaDIP0EnableIOPads.\n"));
 
-    /* Set DIP1 I/O pad state. */
-    /* 3C5.1E[5:4] - DIP1 Power Control
+    /* Set DIP0 I/O pad state. */
+    /* 3C5.1E[7:6] - DIP0 Power Control
      *               0x: Pad always off
      *               10: Depend on the other control signal
      *               11: Pad on/off according to the
      *                   Power Management Status (PMS) */
-    ViaSeqMask(hwp, 0x1E, ioPadState << 4, 0x30);
+    ViaSeqMask(hwp, 0x1E, ioPadState << 6, 0xC0);
     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                "DIP1 I/O Pad State: %s\n",
+                "DIP0 I/O Pad State: %s\n",
                 (ioPadState & 0x02) ?
                     (ioPadState & 0x01) ? "Automatic On / Off" : "Conditional"
                 : "Off");
 
     DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                        "Exiting viaDIP1EnableIOPads.\n"));
+                        "Exiting viaDIP0EnableIOPads.\n"));
 }
 
 /*
@@ -329,7 +329,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
         if (sr12 & 0x20) {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A TV encoder is connected to "
-                        "DIP1.\n");
+                        "DIP0.\n");
 
             /* 3C5.13[4:3] - FPD21-20 pin strapping
              *               00: PAL
@@ -359,7 +359,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
         } else {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A TMDS transmitter (DVI) is connected to "
-                        "DIP1.\n");
+                        "DIP0.\n");
         }
 
         break;
diff --git a/src/via_tv.c b/src/via_tv.c
index 0cd14b8..ed964b6 100644
--- a/src/via_tv.c
+++ b/src/via_tv.c
@@ -73,15 +73,15 @@ viaTVSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
     switch (pVia->Chipset) {
     case VIA_CLE266:
         /* 3C5.12[5] - FPD18 pin strapping
-         *             0: DIP1 (Digital Interface Port 1) is used by
+         *             0: DIP0 (Digital Interface Port 0) is used by
          *                a TMDS transmitter (DVI)
-         *             1: DIP1 (Digital Interface Port 1) is used by
+         *             1: DIP0 (Digital Interface Port 0) is used by
          *                a TV encoder */
         if (sr12 & 0x20) {
-            viaDIP1SetDisplaySource(pScrn, displaySource);
+            viaDIP0SetDisplaySource(pScrn, displaySource);
         } else {
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                        "DIP1 was not set up for "
+                        "DIP0 was not set up for "
                         "an external TV encoder use.\n");
         }
 
@@ -207,15 +207,15 @@ viaTVEnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
     switch (pVia->Chipset) {
     case VIA_CLE266:
         /* 3C5.12[5] - FPD18 pin strapping
-         *             0: DIP1 (Digital Interface Port 1) is used by
+         *             0: DIP0 (Digital Interface Port 0) is used by
          *                a TMDS transmitter (DVI)
-         *             1: DIP1 (Digital Interface Port 1) is used by
+         *             1: DIP0 (Digital Interface Port 0) is used by
          *                a TV encoder */
         if (sr12 & 0x20) {
-            viaDIP1EnableIOPads(pScrn, ioPadState);
+            viaDIP0EnableIOPads(pScrn, ioPadState);
         } else {
             xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-                        "DIP1 is not set up for "
+                        "DIP0 is not set up for "
                         "an external TV encoder use.\n");
         }
 
diff --git a/src/via_ums.h b/src/via_ums.h
index 323a487..d04d90a 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -209,8 +209,8 @@ Bool umsPreInit(ScrnInfoPtr pScrn);
 Bool umsCrtcInit(ScrnInfoPtr pScrn);
 
 /* via_output.c */
-void viaDIP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
-void viaDIP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
+void viaDIP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
+void viaDIP0EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaDVP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
 void viaDVP0EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaDVP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
commit 9ee41a948d655561ad9411e6daa86c1b49347310
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Aug 29 21:29:46 2016 -0700

    Discontinuing TVPort option
    
    Since the detection of an external TV encoder can now be done
    automatically, manual option to set the port (i.e., DVP0, DVP1,
    DFP Low, and DFP High) is discontinued since there is no more
    use for it.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_driver.c b/src/via_driver.c
index 37014c7..ee2ee40 100644
--- a/src/via_driver.c
+++ b/src/via_driver.c
@@ -179,7 +179,6 @@ typedef enum
     OPTION_TVDOTCRAWL,
     OPTION_TVTYPE,
     OPTION_TVOUTPUT,
-    OPTION_TVDIPORT,
     OPTION_DISABLEVQ,
     OPTION_DISABLEIRQ,
     OPTION_TVDEFLICKER,
@@ -209,7 +208,6 @@ static OptionInfoRec VIAOptions[] = {
     {OPTION_TVDEFLICKER,         "TVDeflicker",      OPTV_INTEGER, {0}, FALSE},
     {OPTION_TVTYPE,              "TVType",           OPTV_ANYSTR,  {0}, FALSE},
     {OPTION_TVOUTPUT,            "TVOutput",         OPTV_ANYSTR,  {0}, FALSE},
-    {OPTION_TVDIPORT,            "TVPort",           OPTV_ANYSTR,  {0}, FALSE},
     {OPTION_DISABLEVQ,           "DisableVQ",        OPTV_BOOLEAN, {0}, FALSE},
     {OPTION_DISABLEIRQ,          "DisableIRQ",       OPTV_BOOLEAN, {0}, FALSE},
     {OPTION_AGP_DMA,             "EnableAGPDMA",     OPTV_BOOLEAN, {0}, FALSE},
@@ -660,17 +658,13 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
     pVia->swov.maxWInterp = 800;
     pVia->swov.maxHInterp = 600;
 
-    pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1;
-
     switch (pVia->Chipset) {
         case VIA_CLE266:
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0;
             break;
         case VIA_KM400:
             /* IRQ is not broken on KM400A, but testing (pVia->ChipRev < 0x80)
              * is not enough to make sure we have an older, broken KM400. */
             pVia->DRIIrqEnable = FALSE;
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0;
             break;
         case VIA_K8M800:
             pVia->DRIIrqEnable = FALSE;
@@ -699,7 +693,6 @@ VIASetupDefaultOptions(ScrnInfoPtr pScrn)
             pVia->agpEnable = FALSE;
             /* FIXME: this needs to be tested */
             pVia->dmaXV = FALSE;
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0;
             break;
         case VIA_VX800:
         case VIA_VX855:
@@ -1450,30 +1443,6 @@ viaPreInit(ScrnInfoPtr pScrn, int flags)
                    "No default TV output signal type is set.\n");
     }
 
-    /* TV DI Port */
-    if ((s = xf86GetOptValString(VIAOptions, OPTION_TVDIPORT))) {
-        if (!xf86NameCmp(s, "DVP0")) {
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP0;
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                       "TV Output Port is DVP0.\n");
-        } else if (!xf86NameCmp(s, "DVP1")) {
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DVP1;
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                       "TV Output Port is DVP1.\n");
-        } else if (!xf86NameCmp(s, "DFPHigh")) {
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DFPHIGH;
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                       "TV Output Port is DFPHigh.\n");
-        } else if (!xf86NameCmp(s, "DFPLow")) {
-            pBIOSInfo->TVDIPort = VIA_DI_PORT_DFPLOW;
-            xf86DrvMsg(pScrn->scrnIndex, X_CONFIG,
-                       "TV Output Port is DFPLow.\n");
-        }
-    } else {
-        xf86DrvMsg(pScrn->scrnIndex, X_DEFAULT,
-                   "No default TV output port is set.\n");
-    }
-
     VIAVidHWDiffInit(pScrn);
 
 #ifdef HAVE_DEBUG
diff --git a/src/via_ums.h b/src/via_ums.h
index 10b67c3..323a487 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -176,7 +176,6 @@ typedef struct _VIABIOSINFO {
     int         TVDeflicker;
     CARD8       TVRegs[0xFF];
     int         TVNumRegs;
-    int         TVDIPort;
 
     /* TV Callbacks */
     void (*TVSave) (ScrnInfoPtr pScrn);
diff --git a/src/via_vt162x.c b/src/via_vt162x.c
index 86aae79..897e0c4 100644
--- a/src/via_vt162x.c
+++ b/src/via_vt162x.c
@@ -48,18 +48,14 @@ ViaSetTVClockSource(xf86CrtcPtr crtc)
                 case VIA_CX700:
                 case VIA_VX800:
                 case VIA_VX855:
-					/* IGA1 */
+                    /* IGA1 */
                     if (!iga->index) {
-                        if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
-                            ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
-                        else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
-                            ViaCrtcMask(hwp, 0x6C, 0x90, 0xF0);
+                        /* Fixing it to DVP1 for IGA1. */
+                        ViaCrtcMask(hwp, 0x6C, 0xB0, 0xF0);
+                    /* IGA2 */
                     } else {
-                        /* IGA2 */
-                        if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP1)
-                            ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
-                        else if(pBIOSInfo->TVDIPort == VIA_DI_PORT_DVP0)
-                            ViaCrtcMask(hwp, 0x6C, 0x09, 0x0F);
+                        /* Fixing it to DVP1 for IGA2. */
+                        ViaCrtcMask(hwp, 0x6C, 0x0B, 0x0F);
                     }
                     break;
                 default:
commit 140183cf11075668080cf3eda64a273a8af7ba9e
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Aug 29 20:44:10 2016 -0700

    Support for automatic TV encoder I/O pad turn on
    
    Code was added to perform automatic TV encoder I/O pad turn on.
    The code was written in a way it can detect which external interface
    has the TV encoder attached to it, and select the correct external
    interface automatically. The code supports all Chrome IGPs. (from
    CLE266 chipset all the way to VX900 chipset)
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_outputs.c b/src/via_outputs.c
index d4350d0..aa7a494 100644
--- a/src/via_outputs.c
+++ b/src/via_outputs.c
@@ -73,6 +73,35 @@ viaDIP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 }
 
 /*
+ * Sets DIP1 (Digital Interface Port 1) I/O pad state.
+ * This function is for CLE266 chipset only.
+ */
+void
+viaDIP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Entered viaDIP1EnableIOPads.\n"));
+
+    /* Set DIP1 I/O pad state. */
+    /* 3C5.1E[5:4] - DIP1 Power Control
+     *               0x: Pad always off
+     *               10: Depend on the other control signal
+     *               11: Pad on/off according to the
+     *                   Power Management Status (PMS) */
+    ViaSeqMask(hwp, 0x1E, ioPadState << 4, 0x30);
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "DIP1 I/O Pad State: %s\n",
+                (ioPadState & 0x02) ?
+                    (ioPadState & 0x01) ? "Automatic On / Off" : "Conditional"
+                : "Off");
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Exiting viaDIP1EnableIOPads.\n"));
+}
+
+/*
  * Sets IGA1 or IGA2 as the display output source for DVP0
  * (Digital Video Port) interface.
  */
@@ -99,6 +128,34 @@ viaDVP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 }
 
 /*
+ * Sets DVP0 (Digital Video Port 0) I/O pad state.
+ */
+void
+viaDVP0EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Entered viaDVP0EnableIOPads.\n"));
+
+    /* Set DVP0 I/O pad state. */
+    /* 3C5.1E[7:6] - DVP0 Power Control
+     *               0x: Pad always off
+     *               10: Depend on the other control signal
+     *               11: Pad on/off according to the
+     *                   Power Management Status (PMS) */
+    ViaSeqMask(hwp, 0x1E, ioPadState << 6, 0xC0);
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "DVP0 I/O Pad State: %s\n",
+                (ioPadState & 0x02) ?
+                    (ioPadState & 0x01) ? "Automatic On / Off" : "Conditional"
+                : "Off");
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Exiting viaDVP0EnableIOPads.\n"));
+}
+
+/*
  * Sets IGA1 or IGA2 as the display output source for DVP1
  * (Digital Video Port) interface.
  */
@@ -125,6 +182,34 @@ viaDVP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 }
 
 /*
+ * Sets DVP1 (Digital Video Port 1) I/O pad state.
+ */
+void
+viaDVP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Entered viaDVP1EnableIOPads.\n"));
+
+    /* Set DVP1 I/O pad state. */
+    /* 3C5.1E[5:4] - DVP1 Power Control
+     *               0x: Pad always off
+     *               10: Depend on the other control signal
+     *               11: Pad on/off according to the
+     *                   Power Management Status (PMS) */
+    ViaSeqMask(hwp, 0x1E, ioPadState << 4, 0x30);
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "DVP1 I/O Pad State: %s\n",
+                (ioPadState & 0x02) ?
+                    (ioPadState & 0x01) ? "Automatic On / Off": "Conditional"
+                : "Off");
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Exiting viaDVP1EnableIOPads.\n"));
+}
+
+/*
  * Sets IGA1 or IGA2 as the display output source for VIA Technologies
  * Chrome IGP DFP (Digital Flat Panel) Low interface.
  */
@@ -151,6 +236,34 @@ viaDFPLowSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 }
 
 /*
+ * Sets DFP (Digital Flat Panel) Low I/O pad state.
+ */
+void
+viaDFPLowEnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Entered viaDFPLowEnableIOPads.\n"));
+
+    /* Set DFP Low I/O pad state. */
+    /* 3C5.2A[1:0] - DFP Low Power Control
+     *               0x: Pad always off
+     *               10: Depend on the other control signal
+     *               11: Pad on/off according to the
+     *                   Power Management Status (PMS) */
+    ViaSeqMask(hwp, 0x2A, ioPadState, 0x03);
+    xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                "DFP Low I/O Pad State: %s\n",
+                (ioPadState & 0x02) ?
+                    (ioPadState & 0x01) ? "Automatic On / Off": "Conditional"
+                : "Off");
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Exiting viaDFPLowEnableIOPads.\n"));
+}
+
+/*
  * Reads off the VIA Technologies IGP pin strapping for
  * display detection purposes.
  */
diff --git a/src/via_tv.c b/src/via_tv.c
index 7d69890..0cd14b8 100644
--- a/src/via_tv.c
+++ b/src/via_tv.c
@@ -40,28 +40,6 @@
 #include "via_driver.h"
 #include <unistd.h>
 
-/*
- *
- * TV specific code.
- *
- */
-static void
-ViaDisplayEnableDVO(ScrnInfoPtr pScrn, int port)
-{
-    vgaHWPtr hwp = VGAHWPTR(pScrn);
-
-    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO, "ViaDisplayEnableDVO, port: %d\n",
-                     port));
-    switch (port) {
-    case VIA_DI_PORT_DVP0:
-        ViaSeqMask(hwp, 0x1E, 0xC0, 0xC0);
-        break;
-    case VIA_DI_PORT_DVP1:
-        ViaSeqMask(hwp, 0x1E, 0x30, 0x30);
-        break;
-    }
-}
-
 static void
 viaTVSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 {
@@ -198,6 +176,140 @@ viaTVSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource)
 }
 
 static void
+viaTVEnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState)
+{
+    vgaHWPtr hwp = VGAHWPTR(pScrn);
+    VIAPtr pVia = VIAPTR(pScrn);
+    CARD8 sr12, sr13, sr5a;
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Entered viaTVEnableIOPads.\n"));
+
+    if ((pVia->Chipset == VIA_CX700)
+        || (pVia->Chipset == VIA_VX800)
+        || (pVia->Chipset == VIA_VX855)
+        || (pVia->Chipset == VIA_VX900)) {
+
+        sr5a = hwp->readSeq(hwp, 0x5A);
+        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                            "SR5A: 0x%02X\n", sr5a));
+        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                            "Setting 3C5.5A[0] to 0.\n"));
+        ViaSeqMask(hwp, 0x5A, sr5a & 0xFE, 0x01);
+    }
+
+    sr12 = hwp->readSeq(hwp, 0x12);
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "SR12: 0x%02X\n", sr12));
+    sr13 = hwp->readSeq(hwp, 0x13);
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "SR13: 0x%02X\n", sr13));
+    switch (pVia->Chipset) {
+    case VIA_CLE266:
+        /* 3C5.12[5] - FPD18 pin strapping
+         *             0: DIP1 (Digital Interface Port 1) is used by
+         *                a TMDS transmitter (DVI)
+         *             1: DIP1 (Digital Interface Port 1) is used by
+         *                a TV encoder */
+        if (sr12 & 0x20) {
+            viaDIP1EnableIOPads(pScrn, ioPadState);
+        } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                        "DIP1 is not set up for "
+                        "an external TV encoder use.\n");
+        }
+
+        break;
+    case VIA_KM400:
+    case VIA_K8M800:
+    case VIA_PM800:
+    case VIA_P4M800PRO:
+        /* 3C5.13[3] - DVP0D8 pin strapping
+         *             0: AGP pins are used for AGP
+         *             1: AGP pins are used by FPDP
+         *                (Flat Panel Display Port)
+         * 3C5.12[6] - DVP0D6 pin strapping
+         *             0: Disable DVP0 (Digital Video Port 0)
+         *             1: Enable DVP0 (Digital Video Port 0)
+         * 3C5.12[5] - DVP0D5 pin strapping
+         *             0: DVP0 is used by a TMDS transmitter (DVI)
+         *             1: DVP0 is used by a TV encoder
+         * 3C5.12[4] - DVP0D4 pin strapping
+         *             0: Dual 12-bit FPDP (Flat Panel Display Port)
+         *             1: 24-bit FPDP (Flat Panel Display Port) */
+        if ((sr12 & 0x40) && (sr12 & 0x20)) {
+            viaDVP0EnableIOPads(pScrn, ioPadState);
+        } else if ((sr13 & 0x08) && (~(sr12 & 0x10))) {
+            viaDFPLowEnableIOPads(pScrn, ioPadState);
+        } else if (sr13 & 0x08) {
+            viaDVP1EnableIOPads(pScrn, ioPadState);
+        } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                        "None of the external ports were set up for "
+                        "external TV encoder use.\n");
+        }
+
+        break;
+    case VIA_P4M890:
+    case VIA_K8M890:
+    case VIA_P4M900:
+        /* 3C5.12[6] - FPD6 pin strapping
+         *             0: Disable DVP0 (Digital Video Port 0)
+         *             1: Enable DVP0 (Digital Video Port 0)
+         * 3C5.12[5] - FPD5 pin strapping
+         *             0: DVP0 is used by a TMDS transmitter (DVI)
+         *             1: DVP0 is used by a TV encoder
+         * 3C5.12[4] - FPD4 pin strapping
+         *             0: Dual 12-bit FPDP (Flat Panel Display Port)
+         *             1: 24-bit FPDP (Flat Panel Display Port) */
+        if ((sr12 & 0x40) & (sr12 & 0x20) &(~(sr12 & 0x10))) {
+            viaDVP0EnableIOPads(pScrn, ioPadState);
+        } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                        "Unrecognized external TV encoder use.\n"
+                        "Contact the developer for assistance.\n");
+        }
+
+        break;
+    case VIA_CX700:
+    case VIA_VX800:
+    case VIA_VX855:
+    case VIA_VX900:
+        /* 3C5.13[6] - DVP1 DVP / capture port selection
+         *             0: DVP1 is used as a DVP (Digital Video Port)
+         *             1: DVP1 is used as a capture port
+         */
+        if (~(sr13 & 0x40)) {
+            viaDVP1EnableIOPads(pScrn, ioPadState);
+        } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                        "DVP1 is not set up for external TV "
+                        "encoder use.\n");
+        }
+
+        break;
+    default:
+        xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+                    "Unrecognized IGP for "
+                    "an external TV encoder use.\n");
+        break;
+    }
+
+    if ((pVia->Chipset == VIA_CX700)
+        || (pVia->Chipset == VIA_VX800)
+        || (pVia->Chipset == VIA_VX855)
+        || (pVia->Chipset == VIA_VX900)) {
+
+        hwp->writeSeq(hwp, 0x5A, sr5a);
+        DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                            "Restoring 3C5.5A[0].\n"));
+    }
+
+    DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "Exiting viaTVEnableIOPads.\n"));
+}
+
+static void
 ViaTVSave(ScrnInfoPtr pScrn)
 {
     VIABIOSInfoPtr pBIOSInfo = VIAPTR(pScrn)->pBIOSInfo;
@@ -362,12 +474,13 @@ via_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     ScrnInfoPtr pScrn = output->scrn;
     drmmode_crtc_private_ptr iga = output->crtc->driver_private;
     VIAPtr pVia = VIAPTR(pScrn);
-    VIABIOSInfoPtr pBIOSInfo = VIAPTR(pScrn)->pBIOSInfo;
 
     /* TV on FirstCrtc */
     if (output->crtc) {
         viaTVSetDisplaySource(pScrn, iga->index ? 0x01 : 0x00);
-        ViaDisplayEnableDVO(pScrn, pBIOSInfo->TVDIPort);
+
+        /* Set I/O pads to automatic on / off mode. */
+        viaTVEnableIOPads(pScrn, 0x03);
         ViaTVSetMode(output->crtc, adjusted_mode);
     }
 
diff --git a/src/via_ums.h b/src/via_ums.h
index 7dd060f..10b67c3 100644
--- a/src/via_ums.h
+++ b/src/via_ums.h
@@ -211,9 +211,13 @@ Bool umsCrtcInit(ScrnInfoPtr pScrn);
 
 /* via_output.c */
 void viaDIP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
+void viaDIP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaDVP0SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
+void viaDVP0EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaDVP1SetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
+void viaDVP1EnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaDFPLowSetDisplaySource(ScrnInfoPtr pScrn, CARD8 displaySource);
+void viaDFPLowEnableIOPads(ScrnInfoPtr pScrn, CARD8 ioPadState);
 void viaOutputDetect(ScrnInfoPtr pScrn);
 CARD32 ViaGetMemoryBandwidth(ScrnInfoPtr pScrn);
 CARD32 ViaModeDotClockTranslate(ScrnInfoPtr pScrn, DisplayModePtr mode);
commit fb2a3e59ed6cf8ef37abbc4707d10304f2716a56
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Aug 29 13:07:02 2016 -0700

    Improvement in CLE266 chipset pin strapping diagnostic log messages
    
    While the pin strapping diagnostic log messages do not really do
    anything other than leave log messages, there were several
    implementation flaws in the way it was implemented for CLE266
    chipset. It should leave more accurate information with the new
    fixes.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_outputs.c b/src/via_outputs.c
index ad36023..d4350d0 100644
--- a/src/via_outputs.c
+++ b/src/via_outputs.c
@@ -207,7 +207,7 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
         } else {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A TMDS transmitter (DVI) / capture device is "
-                        "connected to flat panel interface.\n");
+                        "connected to DIP0.\n");
         }
 
         /* 3C5.12[5] - FPD18 pin strapping
@@ -215,29 +215,25 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
          *             1: TV encoder */
         if (sr12 & 0x20) {
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-                        "A TMDS transmitter (DVI) is connected to "
-                        "DVI port.\n");
-        } else {
-            xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "A TV encoder is connected to "
-                        "DVI port.\n");
+                        "DIP1.\n");
 
             /* 3C5.13[4:3] - FPD21-20 pin strapping
              *               00: PAL
              *               01: NTSC
              *               10: PAL-N
              *               11: PAL-NC */
-            if (sr13 & 0x04) {
+            if ((~(sr13 & 0x08)) & (sr13 & 0x04)) {
                 xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                             "NTSC for the TV encoder.\n");
             } else {
-                if (!(sr13 & 0x08)) {
+                if (~(sr13 & 0x08)) {
                     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                                 "PAL for the TV encoder.\n");
                 } else {
                     xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                                 "PAL%s for the TV encoder.\n",
-                                sr13 & 0x04 ? "-NC" : "-N");
+                                (sr13 & 0x04) ? "-NC" : "-N");
                 }
             }
 
@@ -246,7 +242,11 @@ viaProbePinStrapping(ScrnInfoPtr pScrn)
              *             1: 625 lines (PAL) */
             xf86DrvMsg(pScrn->scrnIndex, X_INFO,
                         "%s lines for the TV encoder.\n",
-                        sr12 & 0x40 ? "625" : "525");
+                        (sr12 & 0x40) ? "625" : "525");
+        } else {
+            xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+                        "A TMDS transmitter (DVI) is connected to "
+                        "DIP1.\n");
         }
 
         break;


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