[Openchrome-devel] [Bug 91966] No signal to monitor with X and openchrome using VX855 chipset graphics

bugzilla-daemon at freedesktop.org bugzilla-daemon at freedesktop.org
Fri Jan 15 00:03:31 PST 2016


https://bugs.freedesktop.org/show_bug.cgi?id=91966

--- Comment #121 from Kevin Brace <kevinbrace at gmx.com> ---
(In reply to Christopher from comment #116)

Hi Christopher,

> Take your time, man! Vacations are for enjoying...

I think I figured out the precise cause of your bug . . .
I looked at how a VGA monitor gets detected in OpenChrome, and it appears that
the code is running through a path where OpenChrome failed to detect a VGA
monitor via I2C bus.
So, I went back and compared the current development version OpenChrome Version
0.3.3 (i.e., the latest stuff you cloned it from the Git repository) versus
OpenChrome Version 0.2.904 you claimed that worked fine.
I am glad you compared it against OpenChrome Version 0.2.904 since the older
version indeed detected monitors using I2C bus, but it was not assuming that
only a certain I2C bus was for VGA monitor detection.
What happens in your particular system is that the video display port you have
is a DVI connector (precisely speaking, DVI-I connector).
In VX855 chipset, due to its embedded market focus (Sarcastically, I call this
"it is too hard to compete with Intel and AMD, so we will focus on embedded
market" business model.), it does come with an integrated TMDS transmitter.
DVI's digital portion uses Transition Minimized Differential Signaling (TMDS),
a type of high speed signaling technology originally developed by Silicon
Image, now Lattice Semiconductor.
According to some VIA Technologies documents I found on the Internet, chipsets
with an integrated TMDS transmitter do say that certain I2C buses are used for
certain purposes.
Probably because of this, when the code was completely rewritten in the past
few years to prepare for OS kernel-based display resolution setting (People
call this KMS or Kernel Mode Setting. The OS kernel device driver now takes
care of display control rather than the DDX or Device Dependent X device
driver.), the developer "assumed" that only I2C bus 1 is used for VGA monitor
detection.
The problem is, since VGA does come out of a DVI-I connector and I2C bus 2 is
really recommended for use with DVI (according to their documentation I found
on the Internet), now the VGA detection code really needs to look at I2C bus 2
as well, because of the way DVI-I connector is designed (it has legacy VGA and
DVI, but only one I2C bus).
    The problem with VIA Technologies hardware programming documentation
release policy is that they did release their integrated graphics programming
documentation and chipset programming documentation, but they never released
the chipset (i.e., VX855 chipset) data sheet.
Hence, without the prior experience in the industry working on this type of
hardware, it has been very difficult to figure out which I2C bus is connected
to which display connector.
Because I suspected that the bug you have experienced is an issue related to
screen detection (I came up with this in late December 2015.), I have been
looking around for their chipset data sheets to give me a physical
understanding (Note: I am a digital hardware design background guy.) of what
the display hardware looks like.
I did find one document somewhat similar to VX855 chipset that did help me
understand how they assigned chipset pins for certain display outputs.
    Just for proof, look at this log from the Git repository code you compiled.

___________________________________________________________________________
. . .
[    72.614] (II) Module "i2c" already built-in
[    72.614] (II) CHROME(0): ViaI2CInit
[    72.614] (II) CHROME(0): ViaI2CBus1Init
[    72.614] (II) CHROME(0): I2C bus "I2C bus 1" initialized.
[    72.614] (II) CHROME(0): ViaI2cBus2Init
[    72.614] (II) CHROME(0): I2C bus "I2C bus 2" initialized.
[    72.614] (II) CHROME(0): ViaI2CBus3Init
[    72.614] (II) CHROME(0): I2C bus "I2C bus 3" initialized.
[    72.614] (II) Loading sub module "ddc"
[    72.614] (II) LoadModule: "ddc"
[    72.614] (II) Module "ddc" already built-in
[    72.614] (II) CHROME(0): ViaOutputsDetect
[    72.614] (==) CHROME(0): LVDS-0 : Digital output bus width is 12 bits.
[    72.614] (==) CHROME(0): LVDS-0 : DVI Center is disabled.
[    72.614] (==) CHROME(0): LVDS Panel will not be forced.
[    72.614] (==) CHROME(0): Panel size is not selected from config file.
[    72.615] (II) CHROME(0): Output VGA-1 using monitor section Monitor0
[    72.615] (**) CHROME(0): Option "PreferredMode" "1280x1024"
[    72.616] (II) CHROME(0): I2C device "I2C bus 1:ddc2" registered at address
0xA0.
[    72.623] (--) CHROME(0): Test for CRT with VSYNC
[    72.623] (II) CHROME(0): EDID for output VGA-1
[    72.624] (II) CHROME(0): Output VGA-1 disconnected
[    72.624] (WW) CHROME(0): No outputs definitely connected, trying again...
[    72.624] (II) CHROME(0): Output VGA-1 disconnected
. . .
___________________________________________________________________________


Here is the log with OpenChrome Version 0.2.904 (i.e., the one that worked).

___________________________________________________________________________
. . .
[   146.369] (II) LoadModule: "i2c"
[   146.369] (II) Module "i2c" already built-in
[   146.370] (II) CHROME(0): ViaI2CInit
[   146.370] (II) CHROME(0): ViaI2CBus1Init
[   146.370] (II) CHROME(0): I2C bus "I2C bus 1" initialized.
[   146.370] (II) CHROME(0): ViaI2cBus2Init
[   146.370] (II) CHROME(0): I2C bus "I2C bus 2" initialized.
[   146.370] (II) CHROME(0): ViaI2CBus3Init
[   146.370] (II) CHROME(0): I2C bus "I2C bus 3" initialized.
[   146.370] (II) Loading sub module "ddc"
[   146.370] (II) LoadModule: "ddc"
[   146.370] (II) Module "ddc" already built-in
[   146.370] (II) CHROME(0): I2C device "I2C bus 1:ddc2" registered at address
0xA0.
[   146.373] (II) CHROME(0): ViaOutputsDetect
[   146.373] (II) CHROME(0): VIATVDetect
[   146.375] (II) CHROME(0): ViaDFPDetect
[   146.375] (II) CHROME(0): I2C device "I2C bus 2:ddc2" registered at address
0xA0.
[   146.428] (II) CHROME(0): Manufacturer: DEL  Model: a023  Serial#: 858928979
[   146.428] (II) CHROME(0): Year: 2007  Week: 4
[   146.429] (II) CHROME(0): EDID Version: 1.3
[   146.429] (II) CHROME(0): Analog Display Input,  Input Voltage Level:
0.700/0.700 V
[   146.429] (II) CHROME(0): Sync:  Separate
[   146.429] (II) CHROME(0): Max Image Size [cm]: horiz.: 34  vert.: 27
[   146.429] (II) CHROME(0): Gamma: 2.20
[   146.429] (II) CHROME(0): DPMS capabilities: StandBy Suspend Off; RGB/Color
Display
[   146.429] (II) CHROME(0): Default color space is primary color space
[   146.429] (II) CHROME(0): First detailed timing is preferred mode
[   146.429] (II) CHROME(0): redX: 0.640 redY: 0.330   greenX: 0.300 greenY:
0.600
[   146.429] (II) CHROME(0): blueX: 0.150 blueY: 0.060   whiteX: 0.312 whiteY:
0.329
[   146.429] (II) CHROME(0): Supported established timings:
[   146.429] (II) CHROME(0): 720x400 at 70Hz
[   146.429] (II) CHROME(0): 640x480 at 60Hz
[   146.429] (II) CHROME(0): 640x480 at 75Hz
[   146.429] (II) CHROME(0): 800x600 at 60Hz
[   146.429] (II) CHROME(0): 800x600 at 75Hz
[   146.429] (II) CHROME(0): 1024x768 at 60Hz
[   146.429] (II) CHROME(0): 1024x768 at 75Hz
[   146.429] (II) CHROME(0): 1280x1024 at 75Hz
[   146.429] (II) CHROME(0): Manufacturer's mask: 0
[   146.429] (II) CHROME(0): Supported standard timings:
[   146.429] (II) CHROME(0): #0: hsize: 1152  vsize 864  refresh: 75  vid:
20337
[   146.429] (II) CHROME(0): #1: hsize: 1280  vsize 1024  refresh: 60  vid:
32897
[   146.430] (II) CHROME(0): Supported detailed timing:
[   146.430] (II) CHROME(0): clock: 108.0 MHz   Image Size:  338 x 270 mm
[   146.430] (II) CHROME(0): h_active: 1280  h_sync: 1328  h_sync_end 1440
h_blank_end 1688 h_border: 0
[   146.430] (II) CHROME(0): v_active: 1024  v_sync: 1025  v_sync_end 1028
v_blanking: 1066 v_border: 0
[   146.430] (II) CHROME(0): Serial No: UH57271L327S
[   146.430] (II) CHROME(0): Monitor name: DELL E177FP
[   146.430] (II) CHROME(0): Ranges: V min: 56 V max: 75 Hz, H min: 31 H max:
80 kHz, PixClock max 145 MHz
[   146.430] (II) CHROME(0): EDID (in hex):
[   146.430] (II) CHROME(0):     00ffffffffffff0010ac23a053373233
[   146.430] (II) CHROME(0):     0411010368221b78eeee91a3544c9926
[   146.430] (II) CHROME(0):     0f5054a54b00714f8180010101010101
[   146.430] (II) CHROME(0):     010101010101302a009851002a403070
[   146.430] (II) CHROME(0):     1300520e1100001e000000ff00554835
[   146.430] (II) CHROME(0):     373237314c333237530a000000fc0044
[   146.430] (II) CHROME(0):     454c4c204531373746500a20000000fd
[   146.430] (II) CHROME(0):     00384b1f500e000a2020202020200005
[   146.430] (II) CHROME(0): EDID vendor "DEL", prod id 40995
. . .
___________________________________________________________________________


Here is the critical part of the OpenChrome Version 0.2.904 log.

___________________________________________________________________________
. . .
[   146.370] (II) Module "ddc" already built-in
[   146.370] (II) CHROME(0): I2C device "I2C bus 1:ddc2" registered at address
0xA0.
[   146.373] (II) CHROME(0): ViaOutputsDetect
[   146.373] (II) CHROME(0): VIATVDetect
[   146.375] (II) CHROME(0): ViaDFPDetect
[   146.375] (II) CHROME(0): I2C device "I2C bus 2:ddc2" registered at address
0xA0.
[   146.428] (II) CHROME(0): Manufacturer: DEL  Model: a023  Serial#: 858928979
[   146.428] (II) CHROME(0): Year: 2007  Week: 4
[   146.429] (II) CHROME(0): EDID Version: 1.3
. . .
___________________________________________________________________________


You can clearly see that I2C bus 2 is detecting your Dell monitor, and properly
obtaining EDID from the monitor.
    I will need to rewrite the code so that, for now, I2C bus 1 and 2 are both
used for detecting a VGA monitor.
In the long run, display detection code needs to be rewritten completely since
display detection and allocation is done atomically by display type (i.e., VGA,
TV, LVDS FP, DVI, etc.) currently.
The rewritten code should complete display detection first, and then allocate
display resources based on what was detected.
I hope to get a patch for you to test, hopefully in the next several days (I
already wrote the code, but have not tested it yet.).
Give me as much as a week for the patch to be ready (I need to set up a
different local repository on my computer.).

Regards,

Kevin Brace

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