[Openchrome-devel] xf86-video-openchrome: 2 commits - configure.ac src/via_display.c

Kevin Brace kevinbrace at kemper.freedesktop.org
Fri Jul 1 04:28:34 UTC 2016


 configure.ac      |    2 +-
 src/via_display.c |    7 ++++++-
 2 files changed, 7 insertions(+), 2 deletions(-)

New commits:
commit 31c8c2c3a00a2f878939361cd97cafa68f6d3276
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 30 23:24:19 2016 -0500

    Version bumped to 0.4.905 (Version 0.5 RC6)
    
    This sixth release candidate fixed a bug that prevented Wyse X class
    mobile thin client from booting X.Org Server.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/configure.ac b/configure.ac
index 6b55419..1b4f1f6 100644
--- a/configure.ac
+++ b/configure.ac
@@ -23,7 +23,7 @@
 # Initialize Autoconf
 AC_PREREQ(2.57)
 AC_INIT([xf86-video-openchrome],
-        [0.4.904],
+        [0.4.905],
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg&component=Driver/openchrome],
         [xf86-video-openchrome])
 
commit 7199d8206673d227cd7f2b4332b232d8706773fc
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Thu Jun 30 12:38:55 2016 -0500

    Fix to prevent a freeze in Wyse X class mobile thin client
    
    In Wyse X class mobile thin client, it was observed that setting
    SR2E[3:2] (3C5.2E[3:2]; PCI Master / DMA) to 0b11 (clock on / off
    according to the engine IDLE status) causes an X.Org Server boot
    failure. Setting this register to 0b10 (clock always on) corrects
    the problem.
    
    Signed-off-by: Eric Kudzin <knoppix1337 at yahoo.com>
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/src/via_display.c b/src/via_display.c
index 90c71d1..71d89fb 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -485,6 +485,11 @@ viaIGAInitCommon(ScrnInfoPtr pScrn)
      *               11: PLL on/off according to the PMS */
     ViaSeqMask(hwp, 0x2D, 0x03, 0xC3);
 
+    /* In Wyse X class mobile thin client, it was observed that setting
+     * SR2E[3:2] (3C5.2E[3:2]; PCI Master / DMA) to 0b11 (clock on / off
+     * according to the engine IDLE status) causes an X.Org Server boot
+     * failure. Setting this register to 0b10 (clock always on) corrects
+     * the problem. */
     /* 3C5.2E[7:6] - Capturer (Gated Clock <ECK>)
      *               0x: Clock off
      *               10: Clock always on
@@ -501,7 +506,7 @@ viaIGAInitCommon(ScrnInfoPtr pScrn)
      *               0x: Clock off
      *               10: Clock always on
      *               11: Clock on/off according to the engine IDLE status */
-    ViaSeqMask(hwp, 0x2E, 0xFF, 0xFF);
+    ViaSeqMask(hwp, 0x2E, 0xFB, 0xFF);
 
     /* 3C5.3F[7:6] - CR Clock Control (Gated Clock <ECK>)
      *               0x: Clock off


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