[Openchrome-devel] xf86-video-openchrome: src/via_display.c
Kevin Brace
kevinbrace at kemper.freedesktop.org
Thu Jun 2 08:40:22 UTC 2016
src/via_display.c | 18 +++++++++++++-----
1 file changed, 13 insertions(+), 5 deletions(-)
New commits:
commit 5fe931e71d85b344048fe8324dc0ead2306190a4
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Tue May 31 20:51:47 2016 -0700
Cleanup of the code that sets IGA1 vertical blank end
viaIGA1SetDisplayRegister function contains the code in question.
This function is located inside via_display.c.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/src/via_display.c b/src/via_display.c
index cf393a0..c59bd6a 100644
--- a/src/via_display.c
+++ b/src/via_display.c
@@ -829,6 +829,19 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaCrtcMask(hwp, 0x35, temp >> 7, 0x08);
+ /* Set IGA1 vertical blank end. */
+ /* Vertical blank end requires the value to be 1 less
+ * than the actual value being written, and 8 LSB
+ * (Least Significant Bits) are written straight into the
+ * relevant register. */
+ DEBUG(xf86DrvMsg(pScrn->scrnIndex, X_INFO,
+ "IGA1 CrtcVBlankEnd: %d\n", mode->CrtcVBlankEnd));
+ temp = mode->CrtcVBlankEnd - 1;
+
+ /* 3X5.16[7:0] - Vertical Blanking End Bits [7:0] */
+ hwp->writeCrtc(hwp, 0x16, temp & 0xFF);
+
+
/* vertical sync start : 2047 */
temp = mode->CrtcVSyncStart;
hwp->writeCrtc(hwp, 0x10, temp & 0xFF);
@@ -850,11 +863,6 @@ viaIGA1SetDisplayRegister(ScrnInfoPtr pScrn, DisplayModePtr mode)
ViaCrtcMask(hwp, 0x09, 0x00, 0x1F);
hwp->writeCrtc(hwp, 0x14, 0x00);
- /* vertical blanking end : start + 257 */
- /* temp = mode->CrtcVTotal - 1; */
- temp = mode->CrtcVBlankEnd - 1;
- hwp->writeCrtc(hwp, 0x16, temp);
-
/* offset */
temp = (pScrn->displayWidth * (pScrn->bitsPerPixel >> 3)) >> 3;
/* Make sure that this is 32-byte aligned. */
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